User`s manual

1077 else
1078 state <= state+1;
1079 end
1080 8’h27:
1081 begin
1082 sdai <= 1’b0;
1083 state <= state+1;
1084 end
1085 8’h28:
1086 begin
1087 scl <= 1’b1;
1088 state <= state+1;
1089 end
1090 8’h29:
1091 begin
1092 sdai <= 1’b1;
1093 state <= 0;
1094 end
1095 endcase
1096
1097 endmodule
1098
1099
A.1.9 flash int.v
1 //flash interface
2 module flash_int(reset, clock, op, address, wdata, rdata, busy, flash_data,
3 flash_address, flash_ce_b, flash_oe_b, flash_we_b,
4 flash_reset_b, flash_sts, flash_byte_b);
5
6 parameter access_cycles = 5;
7 parameter reset_assert_cycles = 1000;
8 parameter reset_recovery_cycles = 30;
9
10 input reset, clock; // Reset and clock for the flash interface
11 input [1:0] op; // Flash operation select (read, write, idle)
12 input [22:0] address;
13 input [15:0] wdata;
14 output [15:0] rdata;
15 output busy;
16 inout [15:0] flash_data;
17 output [23:0] flash_address;
18 output flash_ce_b, flash_oe_b, flash_we_b;
19 output flash_reset_b, flash_byte_b;
20 input flash_sts;
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