User`s manual

295
296 ‘define GENERAL_PURPOSE_OUTPUTS 4’b0000
297 ‘define GPO_0_1_ENABLE 1’b0
298 // 0: General purpose outputs 0 and 1 tristated
299 // 1: General purpose outputs 0 and 1 enabled
300 ‘define GPO_2_3_ENABLE 1’b0
301 // 0: General purpose outputs 2 and 3 tristated
302 // 1: General purpose outputs 2 and 3 enabled
303 ‘define BLANK_CHROMA_IN_VBI 1’b1
304 // 0: Chroma decoded and output during vertical blanking
305 // 1: Chroma blanked during vertical blanking
306 ‘define HLOCK_ENABLE 1’b0
307 // 0: GPO 0 is a general purpose output
308 // 1: GPO 0 shows HLOCK status
309
310 ‘define ADV7185_REGISTER_5 {‘HLOCK_ENABLE, ‘BLANK_CHROMA_IN_VBI, ‘GPO_2_3_ENABLE, ‘GPO_0_1_ENABLE, ‘GENERAL_PURPOSE_OUTPUTS}
311
312 ///////////////////////////////////////////////////////////////////////////////
313 // Register 7
314 ///////////////////////////////////////////////////////////////////////////////
315
316 ‘define FIFO_FLAG_MARGIN 5’h10
317 // Sets the locations where FIFO almost-full and almost-empty flags are set
318 ‘define FIFO_RESET 1’b0
319 // 0: Normal operation
320 // 1: Reset FIFO. This bit is automatically cleared
321 ‘define AUTOMATIC_FIFO_RESET 1’b0
322 // 0: No automatic reset
323 // 1: FIFO is autmatically reset at the end of each video field
324 ‘define FIFO_FLAG_SELF_TIME 1’b1
325 // 0: FIFO flags are synchronized to CLKIN
326 // 1: FIFO flags are synchronized to internal 27MHz clock
327
328 ‘define ADV7185_REGISTER_7 {‘FIFO_FLAG_SELF_TIME, ‘AUTOMATIC_FIFO_RESET, ‘FIFO_RESET, ‘FIFO_FLAG_MARGIN}
329
330 ///////////////////////////////////////////////////////////////////////////////
331 // Register 8
332 ///////////////////////////////////////////////////////////////////////////////
333
334 ‘define INPUT_CONTRAST_ADJUST 8’h80
335
336 ‘define ADV7185_REGISTER_8 {‘INPUT_CONTRAST_ADJUST}
337
338 ///////////////////////////////////////////////////////////////////////////////
339 // Register 9
340 ///////////////////////////////////////////////////////////////////////////////
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