User`s manual

56 end
57 quotient = (!negative_output) ?
58 quotient_temp :
59 ~quotient_temp + 1’b1;
60 divider_copy = divider_copy >> 1;
61 bit = bit - 1’b1;
62 end
63 end
64 endmodule
A.1.6 ycrcb2rgb.v
1 ‘timescale 1ns / 1ps
2 //////////////////////////////////////////////////////////////////////////////////
3 // Company:
4 // Engineer:
5 //
6 // Create Date: 18:05:46 12/02/2014
7 // Design Name:
8 // Module Name: ycrcb2rgb
9 // Project Name:
10 // Target Devices:
11 // Tool versions:
12 // Description:
13 //
14 // Dependencies:
15 //
16 // Revision:
17 // Revision 0.01 - File Created
18 // Additional Comments:
19 //
20 //////////////////////////////////////////////////////////////////////////////////
21 module ycrcb2rgb ( R, G, B, clk, rst, Y, Cr, Cb );
22
23 output [7:0] R, G, B;
24
25 input clk,rst;
26 input[9:0] Y, Cr, Cb;
27
28 wire [7:0] R,G,B;
29 reg [20:0] R_int,G_int,B_int,X_int,A_int,B1_int,B2_int,C_int;
30 reg [9:0] const1,const2,const3,const4,const5;
31 reg[9:0] Y_reg, Cr_reg, Cb_reg;
32
33 //registering constants
34 always @ (posedge clk)
39