User`s manual

107 94: begin ones <= 4; tens <= 9; end
108 95: begin ones <= 5; tens <= 9; end
109 96: begin ones <= 6; tens <= 9; end
110 97: begin ones <= 7; tens <= 9; end
111 98: begin ones <= 8; tens <= 9; end
112 99: begin ones <= 9; tens <= 9; end
113 default: begin ones <= 0; tens <= 0; end
114 endcase
115 hundreds <= 0;
116 end
117 endmodule
118
119 // Note: a computational logic based binary to BCD is found at:
120 // http://www.deathbylogic.com/2013/12/binary-to-binary-coded-decimal-bcd-converter/
121
122 module BCDTest;
123 reg [7:0] number = 8’d65;
124 wire [3:0] hundreds;
125 wire [3:0] tens;
126 wire [3:0] ones;
127
128 BCD bc(number, hundreds, tens, ones);
129 initial begin
130 #100
131 $display("%d, %d, %d", hundreds, tens, ones);
132 $stop();
133 end
134 endmodule
A.3.15 ClockDivider.v
1 // Shawn Jain
2 // From Lab 4
3 // Sends a pulse on oneHertz_enable every Hz clock cycles
4
5 module ClockDivider #(parameter Hz = 27000000)(
6 input clock, reset, fastMode,
7 output reg oneHertz_enable
8 );
9
10 reg [24:0] counter = 25’b0;
11
12 always @ (posedge clock) begin
13 if (reset) begin
14 counter <= 25’b0;
15 oneHertz_enable <= 1’b0;
244