User`s manual

144
145 reg ncs_reg;
146
147 wire dev_clk;
148 acc_clk ac(.clk(clk), .dev_clk(dev_clk));
149
150 reg[7:0] par_in;
151 reg pts_start;
152 par_to_ser pts(.clk(dev_clk), .par(par_in), .start(pts_start), .ser(sda));
153
154 wire[7:0] par_out;
155 ser_to_par stp(.clk(dev_clk), .ser(sdo), .par(par_out));
156
157 reg ma_x_in_ready;
158 reg [7:0] x_low_bits = 0;
159 reg signed [15:0] ma_x_in;
160 wire ma_x_avg_ready;
161 wire signed [15:0] ma_x_avg;
162 moving_avg ma_x(
163 .clock(dev_clk), .in_ready(ma_x_in_ready), .reset(reset),
164 .data(ma_x_in),
165 .avg(ma_x_avg),
166 .avg_ready(ma_x_avg_ready)
167 );
168
169 reg ma_y_in_ready;
170 reg [7:0] y_low_bits = 0;
171 reg signed [15:0] ma_y_in;
172 wire ma_y_avg_ready;
173 wire signed [15:0] ma_y_avg;
174 moving_avg ma_y(
175 .clock(dev_clk), .in_ready(ma_y_in_ready), .reset(reset),
176 .data(ma_y_in),
177 .avg(ma_y_avg),
178 .avg_ready(ma_y_avg_ready)
179 );
180
181 // invariants: when transitioning out of a state always set counter to 0
182 always @(posedge dev_clk) begin
183 case (state)
184 MEASURE_INIT: begin
185 if (count == 5’d18) begin
186 count <= 0;
187 state <= X_READ;
188 end
189 else begin
124