User`s manual
This module first initializes the accelerometer and then reads x and y acceler-
ation values from it in a loop. The clock used for accelerometer communications
is our 50 MHz system clock slowed by a factor of 20, which meets the the max
clock frequency spec of 5 MHz. Most of the default configurations for the ac-
celerometer are acceptable for our purposes; the only initialization we need to
do is set the measure bit of the POWER CTL register (each register contains a
single byte). Since this register is at address 0x2D, and since we want to perform
a single-byte write to it, we first drive the SDI pin with the serial bit stream
8’b00101101 (see Figure 5 in the timing diagram upper two bits for mode and
lower six bits for register address). This specifies the mode and register address,
and can then be used to drive it with the data to be stored in the register. By
default, the accelerometer can measure acceleration values in the range of ±2g.
This is sufficient for our purposes since we care only about static acceleration
(which is in the range ±1g).
After 16 accelerometer clock cycles have passed, we know that we have sent
all of the necessary initialization data to the accelerometer. We then transi-
tion our accelerometer state machine to the x-y read loop. Since the x and y
acceleration readings are 16 bits (two registers’ worth, since the accelerometer
gives us 10 bits of precision), we want to perform a multi-byte read of the x and
y registers. This can be done in the manner shown in Figure 6 of the timing
diagram. We simply assert the R and MB bits, continue driving SDI with the
address bits for the first x or first y register (the second registers for x and y
immediately follow the first, which is why the multi-byte read of contiguous
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