Integrated Controller Hardware Specifications Sheet

Pin Multiplexing
Multi-Purpose Pins Functional Summary
Copyright © 2008 Marvell Doc. No. MV-S104859-U0 Rev. E
December 2, 2008, Preliminary Document Classification: Proprietary Information Page 53
Table 26: MPP Function Summary
Pin name 0x0 0x1 0x2 0x3 0x4 0x5 0xC 0xD
MPP[0]
GPIO[0]
(in/out)
NF_IO[2]
(in/out)
SPI_SCn
(out)
-----
MPP[1]
GPO[1] (out
only)
NF_IO[3]
(in/out)
SPI_MOSI
(out)
-----
MPP[2]
GPO[2] (out
only)
NF_IO[4]
(in/out)
SPI_SCK
(out)
-----
MPP[3]
GPO[3] (out
only)
NF_IO[5]
(in/out)
SPI_MISO
(in)
-----
MPP[4]
GPIO[4]
(in/out)
NF_IO[6]
(in/out)
UA0_RXD
(in)
--
SATA1_AC
Tn (out)
-
PTP_CLK
(in)
MPP[5]
GPO[5] (out
only)
NF_IO[7]
(in/out)
UA0_TXD
(out)
-
PTP_TRIG_
GEN (out)
SATA0_AC
Tn (out)
--
MPP[6] -
SYSRST_O
UTn (out)
SPI_MOSI
(out)
PTP_TRIG_
GEN (out)
----
MPP[7]
GPO[7] (out
only)
PEX_RST_
OUTn (out)
SPI_SCn
(out)
PTP_TRIG_
GEN (out)
----
MPP[8]
GPIO[8]
(in/out)
TW_SDA
(in/out)
UA0_RTS
(out)
UA1_RTS
(out)
MII0_RXER
R (in)
SATA1_PR
ESE NTn
(out)
PTP_CLK
(in)
MII0_COL
(in)
MPP[9]
GPIO[9]
(in/out)
TW_SCK
(in/out)
UA0_CTS
(in)
UA1_CTS
(in)
-
SATA0_PR
ESE NTn
(out)
PTP_EVEN
T_REQ (in)
MII0_CRS
(in)
MPP[10]
GPO [10]
(out only)
-
SPI_SCK
(out)
UA0_TXD
(out)
-
SATA1_AC
Tn (out)
PTP_TRIG_
GEN (out)
-
MPP[11]
GPIO[11]
(in/out)
-
SPI_MISO
(in)
UA0_RXD
(in)
PTP_EVEN
T_REQ (in)
SATA0_AC
Tn (out)
PTP_TRIG_
GEN (out)
PTP_clk
(in)
MPP[12]
GPO[12]
(out only)
SD_CLK
(out)
------
MPP[13]
GPIO[13]
(in/out)
SD_CMD
(in/out)
-
UA1_TXD
(out)
----
MPP[14]
GPIO[14]
(in/out)
SD_D[0]
(in/out)
-
UA1_RXD
(in)
SATA1_PR
ESE NTn
(out)
--
MII0_COL
(in)
M
PP[15
]
GPIO[15]
(in/out)
SD_D[1]
(in/out)
UA0_RTS
(out)
UA1_TXD
(out)
SATA0_AC
Tn (out)
---
MPP[16]
GPIO[16]
(in/out)
SD_D[2]
(in/out)
UA0_CTS
(in)
UA1_RXD
(in)
SATA1_AC
Tn (out)
--
MII0_CRS
(in)
MPP[17]
GPIO[17]
(in/out)
SD_D[3]
(in/out)
--
SATA0_PR
ESE NTn
(out)
---