Specifications

www.ti.com Known Design Marginality/Exceptions to Functional Specifications
Advisory RAM Controller: Cortex™-M3 Accesses to Shared RAM (Cx and Sx) and to MSG
RAM Do Not Work When Any Other Master (µDMA/C28x/DMA) Simultaneously
Accesses the Same Memory
Revision(s) Affected 0
Details If Cortex™-M3 accesses Shared RAM (Cx and Sx) or MSG RAM when any other master
(µDMA/C28x/DMA) accesses the same memory, data and parity may get corrupted in
the memory.
Workaround(s) When Cortex™-M3 accesses Shared RAM or MSG RAM, no other master
(µDMA/C28x/DMA) should access the same memory at that time.
Advisory RAM Controller: µDMA Accesses to Shared RAM (Cx and Sx) and to MSG RAM Do
Not Work When Any Other Master (Cortex™-M3/C28x/DMA) Simultaneously
Accesses the Same Memory
Revision(s) Affected 0
Details If µDMA accesses Shared RAM (Cx and Sx) or MSG RAM when any other master
(Cortex™-M3/C28x/DMA) accesses the same memory, data and parity may get
corrupted in the memory.
Workaround(s) When µDMA accesses Shared RAM or MSG RAM, no other master
(Cortex™-M3/C28x/DMA) should access the same memory at that time.
17
SPRZ357B– August 2011– Revised January 2012 F28M35x Concerto MCU Silicon Errata
Submit Documentation Feedback
Copyright © 2011–2012, Texas Instruments Incorporated