Datasheet

Table Of Contents
3 Functional Description
Interface Signal Pin Function
SPI0/1
SPICLK_out_mux SPICLK
Support Standard SPI, Dual SPI,
QSPI, QPI, OSPI, and OPI that
allow connection to external flash
and RAM.
SPICS0_out SPICS0
SPICS1_out SPICS1
SPID_in/_out SPID
SPIQ_in/_out SPIQ
SPIWP_in/_out SPIWP
SPIHD_in/_out SPIHD
SPID4_in/_out GPIO33
SPID5_in/_out GPIO34
SPID6_in/_out GPIO35
SPID7_in/_out GPIO36
SPIDQS_in/_out GPIO37
SPI2
FSPICLK_in/_out_mux
Any GPIO pins
Support:
master mode of SPI, Dual
SPI, Quad SPI,Octal SPI,
QPI, and OPI, and slave
mode of SPI, Dual SPI,
Quad SPI, and QPI;
connection to external
flash, RAM, and other SPI
devices;
four modes of SPI transfer
format;
configurable SPI
frequency;
64-byte FIFO or DMA
buffer.
FSPICS0_in/_out
FSPICS1~5_out
FSPID_in/_out
FSPIQ_in/_out
FSPIWP_in/_out
FSPIHD_in/_out
FSPIIO4~7_in/_out
FSPIDQS_out
SPI3
SPI3_CLK_in/_out_mux
Any GPIO pins
Support:
master and slave modes of
SPI, Dual SPI, Quad SPI,
and QPI;
four modes of SPI transfer
format;
configurable frequency;
64-byte FIFO or DMA
buffer.
SPI3_CS0_in/_out
SPI3_CS1_out
SPI3_CS2_out
SPI3_D_in/_out
SPI3_Q_in/_out
SPI3_WP_in/_out
SPI3_HD_in/_out
Pulse counter
PCNT_SIG_CH0_in0~3
Any GPIO pins
Capture pulse and count pulse
edges in seven modes
PCNT_SIG_CH1_in0~3
PCNT_CTRL_CH0_in0~3
PCNT_CTRL_CH1_in0~3
Espressif Systems 48
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ESP32-S3 Series Datasheet v1.2