Datasheet
Table Of Contents
- Product Overview
- 1 ESP32-S3 Series Comparison
- 2 Pin Definition
- 3 Functional Description
- 3.1 CPU and Memory
- 3.2 RTC and Low-Power Management
- 3.3 Analog Peripherals
- 3.4 System Components
- 3.5 Digital Peripherals
- 3.5.1 IO MUX and GPIO Matrix
- 3.5.2 Serial Peripheral Interface (SPI)
- 3.5.3 LCD Interface
- 3.5.4 Camera Interface
- 3.5.5 UART Controller
- 3.5.6 I2C Interface
- 3.5.7 I2S Interface
- 3.5.8 Remote Control Peripheral
- 3.5.9 Pulse Count Controller
- 3.5.10 LED PWM Controller
- 3.5.11 USB 2.0 OTG Full-Speed Interface
- 3.5.12 USB Serial/JTAG Controller
- 3.5.13 Motor Control PWM (MCPWM)
- 3.5.14 SD/MMC Host Controller
- 3.5.15
- 3.6 Radio and Wi-Fi
- 3.7 Bluetooth LE
- 3.8 Timers and Watchdogs
- 3.9 Cryptography/Security Components
- 3.10 Peripheral Pin Configurations
- 4 Electrical Characteristics
- 5 Package Information
- 6 Related Documentation and Resources
- Revision History
3 Functional Description
Manual.
3.5.10 LED PWM Controller
The LED PWM controller can generate independent digital waveforms on eight channels. The LED PWM
controller has the following features:
• Can generate a digital waveform with configurable periods and duty cycle. The duty cycle resolution can be
up to 14 bits within a 1 ms period.
• Has multiple clock sources, including APB clock and external main crystal clock.
• Can operate when the CPU is in Light-sleep mode.
• Supports gradual increase or decrease of duty cycle, which is useful for the LED RGB color-fading
generator.
For more information, please refer to Chapter LED PWM Controller (LEDC) in ESP32-S3 Technical Reference
Manual.
3.5.11 USB 2.0 OTG FullSpeed Interface
ESP32-S3 features a full-speed USB OTG interface along with an integrated transceiver. The USB OTG interface
complies with the USB 2.0 specification. It has the following features:
General Features
• FS and LS data rates
• HNP and SRP as A-device or B-device
• Dynamic FIFO (DFIFO) sizing
• Multiple modes of memory access
– Scatter/Gather DMA mode
– Buffer DMA mode
– Slave mode
• Can choose integrated transceiver or external transceiver
• Utilizing integrated transceiver with USB Serial/JTAG by time-division multiplexing when only integrated
transceiver is used
• Support USB OTG using one of the transceivers while USB Serial/JTAG using the other one when both
integrated transceiver or external transceiver are used
Device Mode Features
• Endpoint number 0 always present (bi-directional, consisting of EP0 IN and EP0 OUT)
• Six additional endpoints (endpoint numbers 1 to 6), configurable as IN or OUT
• Maximum of five IN endpoints concurrently active at any time (including EP0 IN)
• All OUT endpoints share a single RX FIFO
• Each IN endpoint has a dedicated TX FIFO
Host Mode Features
• 8 channels (pipes)
Espressif Systems 36
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ESP32-S3 Series Datasheet v1.2