Datasheet

3 Functional Description
frequency is configurable. Data transmission is in multiples of bytes. The clock polarity (CPOL) and phase
(CPHA) are also configurable. The SPI2 interface supports DMA.
– In two-line full-duplex communication mode, the host’s clock frequency is configurable to 80 MHz at
most, and the slave’s clock frequency to 60 MHz at most. Four modes of SPI transfer format are
supported. Only SDR reads and writes are supported.
– In single-/two-/four-/eight-line half-duplex communication mode, the host’s clock frequency is
configurable to 80 MHz at most for SDR reads/writes and 40 MHz for DDR reads/writes. Four modes
of SPI transfer format are supported.
– In single-/two-/four-line half-duplex communication mode, the slave’s clock frequency is configurable
to 60 MHz at most. Only SDR reads and writes are supported. Four modes of SPI transfer format are
supported.
• SPI3 Generalpurpose SPI (GPSPI) mode
SPI3 can operate in master and slave modes, in two-line full-duplex and single-line, two-line and four-line
half-duplex communication modes. Only SDR reads and writes are supported. The host’s clock frequency
is configurable. Data transmission is in multiples of bytes. The clock polarity (CPOL) and phase (CPHA) are
also configurable. The SPI3 interface supports DMA.
– In two-line full-duplex communication mode, the host’s clock frequency is configurable to a maximum
of 80 MHz, and the slave’s clock frequency to a maximum of 60 MHz. Four modes of SPI transfer
format are supported.
– In single-line, two-line and four-line half-duplex communication mode, the host’s clock frequency is
configurable to a maximum of 80 MHz, and the slave’s clock frequency to 60 MHz at most. Four
modes of SPI transfer format are supported.
In most cases, the data port connection between ESP32-S3 and external flash is as follows:
Table 12: Connection Between ESP32S3 and External Flash
External Flash Data Port
Chip Pin SPI SingleLine Mode SPI TwoLine Mode SPI FourLine Mode SPI EightLine Mode
SPID (SPID) DI IO0 IO0 IO0
SPIQ (SPIQ) DO IO1 IO1 IO1
SPIWP (SPIWP) WP# — IO2 IO2
SPIHD (SPIHD) HOLD# — IO3 IO3
GPIO33 — — — IO4
GPIO34 — — — IO5
GPIO35 — — — IO6
GPIO36 — — — IO7
GPIO37 — — — DQS
3.5.3 LCD Interface
ESP32-S3 supports 8-bit ~16-bit parallel RGB, I8080, and MOTO6800 interfaces. These interfaces operate at
40 MHz or lower, and support conversion among RGB565, YUV422, YUV420, and YUV411.
Espressif Systems 33
Submit Documentation Feedback
ESP32-S3 Series Datasheet v1.2