Datasheet

3 Functional Description
Manual.
3.4.5 GDMA Controller
ESP32-S3 has a general-purpose DMA controller (GDMA) with five independent channels for transmitting and
another five independent channels for receiving. These ten channels are shared by peripherals that have DMA
feature, and support dynamic priority.
The DMA controller controls data transfer using linked lists. It allows peripheral-to-memory and
memory-to-memory data transfer at a high speed. All channels can access internal and external RAM.
The ten peripherals on ESP32-S3 with DMA feature are SPI2, SPI3, UHCI0, I2S0, I2S1, LCD/CAM, AES, SHA,
ADC, and RMT.
For detailed information, please refer to Chapter GDMA Controller (GDMA) in ESP32-S3 Technical Reference
Manual.
3.4.6 CPU Clock
The CPU clock has three possible sources:
• External main crystal clock
• Internal fast RC oscillator (typically about 17.5 MHz, and adjustable)
• PLL clock
The application can select the clock source from the three clocks above. The selected clock source drives the
CPU clock directly, or after division, depending on the application. Once the CPU is reset, the default clock
source would be the external main crystal clock divided by 2.
Note:
ESP32-S3 is unable to operate without an external main crystal clock.
For more information about clocks, please refer to Chapter Reset and Clock in ESP32-S3 Technical Reference
Manual.
3.4.7 RTC Clock
The RTC slow clock is used for RTC counter, RTC watchdog and low-power controller. It has three possible
sources:
• External low-speed (32 kHz) crystal clock
• Internal slow RC oscillator (typically about 136 kHz, and adjustable)
• Internal fast RC oscillator divided clock (derived from the internal fast RC oscillator divided by 256)
The RTC fast clock is used for RTC peripherals and sensor controllers. It has two possible sources:
• External main crystal clock divided by 2
• Internal fast RC oscillator (typically about 17.5 MHz, and adjustable)
3.4.8 Clock Glitch Detection
The Clock Glitch Detection module on ESP32-S3 monitors input clock signals from XTAL_CLK. If it detects a
glitch with a width shorter than 3 ns, input clock signals from XTAL_CLK are blocked.
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ESP32-S3 Series Datasheet v1.2