Datasheet
Table Of Contents
- Product Overview
- 1 ESP32-S3 Series Comparison
- 2 Pin Definition
- 3 Functional Description
- 3.1 CPU and Memory
- 3.2 RTC and Low-Power Management
- 3.3 Analog Peripherals
- 3.4 System Components
- 3.5 Digital Peripherals
- 3.5.1 IO MUX and GPIO Matrix
- 3.5.2 Serial Peripheral Interface (SPI)
- 3.5.3 LCD Interface
- 3.5.4 Camera Interface
- 3.5.5 UART Controller
- 3.5.6 I2C Interface
- 3.5.7 I2S Interface
- 3.5.8 Remote Control Peripheral
- 3.5.9 Pulse Count Controller
- 3.5.10 LED PWM Controller
- 3.5.11 USB 2.0 OTG Full-Speed Interface
- 3.5.12 USB Serial/JTAG Controller
- 3.5.13 Motor Control PWM (MCPWM)
- 3.5.14 SD/MMC Host Controller
- 3.5.15
- 3.6 Radio and Wi-Fi
- 3.7 Bluetooth LE
- 3.8 Timers and Watchdogs
- 3.9 Cryptography/Security Components
- 3.10 Peripheral Pin Configurations
- 4 Electrical Characteristics
- 5 Package Information
- 6 Related Documentation and Resources
- Revision History
3 Functional Description
3.4.3 Permission Control
In ESP32-S3, the Permission Control module is used to control access to the slaves (including internal memory,
peripherals, external flash and RAM). The host can access its slave only if it has the right permission. In this way,
data and instructions are protected from illegitimate read or write.
The ESP32-S3 CPU can run in both Secure World and Non-secure World where independent permission
controls are adopted. The Permission Control module is able to identify which World the host is running and then
proceed with its normal operations.
The Permission Control module has the following features:
• Manage access to internal memory by:
– CPU
– CPU trace module
– GDMA
• Manage access to external flash and RAM by:
– MMU
– SPI1
– GDMA
– CPU through Cache
• Manage access to peripherals, supporting
– independent permission control for each peripheral
– monitoring non-aligned access
– access control for customized address range
• Integrate permission lock register
– All permission registers can be locked with the permission lock register. Once locked, the permission
register and the lock register cannot be modified, unless the CPU is reset.
• Integrate permission monitor interrupt
– In case of illegitimate access, the permission monitor interrupt will be triggered and the CPU will be
informed to handle the interrupt.
3.4.4 System Registers
ESP32-S3 system registers can be used to control the following peripheral blocks and core modules:
• System and memory
• Clock
• Software Interrupt
• Low-power management
• Peripheral clock gating and reset
• CPU Control
For detailed information, please refer to Chapter System Registers in ESP32-S3 Technical Reference
Espressif Systems 30
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ESP32-S3 Series Datasheet v1.2