Datasheet
Table Of Contents
- Product Overview
- 1 ESP32-S3 Series Comparison
- 2 Pin Definition
- 3 Functional Description
- 3.1 CPU and Memory
- 3.2 RTC and Low-Power Management
- 3.3 Analog Peripherals
- 3.4 System Components
- 3.5 Digital Peripherals
- 3.5.1 IO MUX and GPIO Matrix
- 3.5.2 Serial Peripheral Interface (SPI)
- 3.5.3 LCD Interface
- 3.5.4 Camera Interface
- 3.5.5 UART Controller
- 3.5.6 I2C Interface
- 3.5.7 I2S Interface
- 3.5.8 Remote Control Peripheral
- 3.5.9 Pulse Count Controller
- 3.5.10 LED PWM Controller
- 3.5.11 USB 2.0 OTG Full-Speed Interface
- 3.5.12 USB Serial/JTAG Controller
- 3.5.13 Motor Control PWM (MCPWM)
- 3.5.14 SD/MMC Host Controller
- 3.5.15
- 3.6 Radio and Wi-Fi
- 3.7 Bluetooth LE
- 3.8 Timers and Watchdogs
- 3.9 Cryptography/Security Components
- 3.10 Peripheral Pin Configurations
- 4 Electrical Characteristics
- 5 Package Information
- 6 Related Documentation and Resources
- Revision History
performance
– Efficient L1 cache to improve execution of
external memory
– Single-precision floating-point unit (FPU) to
accelerate computing
• Highlyintegrated RF module that provides
industry-leading power and RF performance
• Stateoftheart power management designed
for a wide range of applications with its multiple
low-power modes. The ULP coprocessor can
operate in ultra-low-power mode.
• Powerful storage capacities ensured by 512
KB SRAM and 384 KB ROM on the chip, and
SPI, Dual SPI, Quad SPI, Octal SPI, QPI, and OPI
interfaces that allow connection to flash and
external RAM
• Reliable security features ensured by
– Cryptographic hardware accelerators that
support AES-128/256, Hash, RSA, HMAC,
digital signature, and secure boot
– Random number generator
– Permission control on accessing internal
and external memory
– External memory encryption and decryption
• Rich set of peripheral interfaces and GPIOs,
ideal for various scenarios and complex
applications
Features
WiFi
• IEEE 802.11 b/g/n-compliant
• Supports 20 MHz, 40 MHz bandwidth in 2.4
GHz band
• 1T1R mode with data rate up to 150 Mbps
• Wi-Fi Multimedia (WMM)
• TX/RX A-MPDU, TX/RX A-MSDU
• Immediate Block ACK
• Fragmentation and defragmentation
• Automatic Beacon monitoring (hardware TSF)
• 4 × virtual Wi-Fi interfaces
• Simultaneous support for Infrastructure BSS in
Station, SoftAP, or Station + SoftAP modes
Note that when ESP32-S3 scans in Station
mode, the SoftAP channel will change along with
the Station channel
• Antenna diversity
• 802.11mc FTM
• External PA is supported
Bluetooth
• Bluetooth LE: Bluetooth 5, Bluetooth mesh
• High power mode (20 dBm, share the same PA
with Wi-Fi)
• Speed: 125 Kbps, 500 Kbps, 1 Mbps, 2 Mbps
• Advertising extensions
• Multiple advertisement sets
• Channel selection algorithm #2
• Internal co-existence mechanism between Wi-Fi
and Bluetooth to share the same antenna
CPU and Memory
• Xtensa
®
dual-core 32-bit LX7 microprocessor,
up to 240 MHz
• CoreMark
®
score:
– 1 core at 240 MHz: 613.86 CoreMark; 2.56
CoreMark/MHz
– 2 cores at 240 MHz: 1181.60 CoreMark;
4.92 CoreMark/MHz
• 128-bit data bus and SIMD commands
• 384 KB ROM
• 512 KB SRAM
• 16 KB SRAM in RTC
• SPI, Dual SPI, Quad SPI, Octal SPI, QPI and OPI
Espressif Systems 3
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ESP32-S3 Series Datasheet v1.2