Datasheet
Table Of Contents
- Product Overview
- 1 ESP32-S3 Series Comparison
- 2 Pin Definition
- 3 Functional Description
- 3.1 CPU and Memory
- 3.2 RTC and Low-Power Management
- 3.3 Analog Peripherals
- 3.4 System Components
- 3.5 Digital Peripherals
- 3.5.1 IO MUX and GPIO Matrix
- 3.5.2 Serial Peripheral Interface (SPI)
- 3.5.3 LCD Interface
- 3.5.4 Camera Interface
- 3.5.5 UART Controller
- 3.5.6 I2C Interface
- 3.5.7 I2S Interface
- 3.5.8 Remote Control Peripheral
- 3.5.9 Pulse Count Controller
- 3.5.10 LED PWM Controller
- 3.5.11 USB 2.0 OTG Full-Speed Interface
- 3.5.12 USB Serial/JTAG Controller
- 3.5.13 Motor Control PWM (MCPWM)
- 3.5.14 SD/MMC Host Controller
- 3.5.15
- 3.6 Radio and Wi-Fi
- 3.7 Bluetooth LE
- 3.8 Timers and Watchdogs
- 3.9 Cryptography/Security Components
- 3.10 Peripheral Pin Configurations
- 4 Electrical Characteristics
- 5 Package Information
- 6 Related Documentation and Resources
- Revision History
3 Functional Description
• Lightsleep mode: The CPU is paused. The RTC peripherals, as well as the ULP coprocessor can be
woken up periodically by the timer. Any wake-up events (MAC, host, RTC timer, or external interrupts) will
wake up the chip. Wireless connection can remain active. Users can optionally decide what peripherals to
shut down/keep on (refer to Figure 1), for power-saving purpose.
• Deepsleep mode: CPU and most peripherals are powered down. Only the RTC memory is powered on
and RTC peripherals are optional. Wi-Fi connection data are stored in the RTC memory. The ULP
coprocessor is functional.
For power consumption in different power modes, please refer to Table 21.
3.2.2 UltraLowPower Coprocessor
The ULP coprocessor is designed as a simplified, low-power replacement of CPU in sleep modes. It can be also
used to supplement the functions of the CPU in normal working mode. The ULP coprocessor and RTC memory
remain powered on during the Deep-sleep mode. Hence, the developer can store a program for the ULP
coprocessor in the RTC slow memory to access RTC GPIO, RTC peripheral devices, RTC timers and internal
sensors in Deep-sleep mode.
ESP32-S3 has two ULP coprocessors, one based on RISC-V instruction set architecture (ULP-RISC-V) and the
other on finite state machine (ULP-FSM). The clock of the coprocessors is the internal fast RC oscillator.
ULPRISCV has the following features:
• Support for RV32IMC instruction set
• Thirty-two 32-bit general-purpose registers
• 32-bit multiplier and divider
• Support for interrupts
• Booted by the CPU, its dedicated timer, or RTC GPIO
ULPFSM has the following features:
• Support for common instructions including arithmetic, jump, and program control instructions
• Support for on-board sensor measurement instructions
• Booted by the CPU, its dedicated timer, or RTC GPIO
Note that these two coprocessors cannot work simultaneously.
3.3 Analog Peripherals
3.3.1 AnalogtoDigital Converter (ADC)
ESP32-S3 integrates two 12-bit SAR ADCs and supports measurements on 20 channels (analog-enabled pins).
For power-saving purpose, the ULP coprocessors in ESP32-S3 can also be used to measure voltage in sleep
modes. By using threshold settings or other methods, we can awaken the CPU from sleep modes.
3.3.2 Temperature Sensor
The temperature sensor generates a voltage that varies with temperature. The voltage is internally converted via
an ADC into a digital value.
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ESP32-S3 Series Datasheet v1.2