Datasheet

2 Pin Definition
The power scheme diagram is shown in Figure 4.
Figure 4: ESP32S3 Power Scheme
Notes on CHIP_PU:
Figure 5 shows the power-up and reset timing of ESP32-S3 series. Details about the parameters are listed in
Table 7.
VDDA,
VDD3P3,
VDD3P3_RTC,
VDD3P3_CPU
CHIP_PU
t
0
t
1
V
IL_nRST
2.8 V
Figure 5: ESP32S3 Powerup and Reset Timing
Table 7: Description of ESP32S3 Powerup and Reset Timing Parameters
Parameter Description Min (µs)
t
0
Time between bringing up the VDDA, VDD3P3, VDD3P3_RTC, and
VDD3P3_CPU rails, and activating CHIP_PU
50
t
1
Duration of CHIP_PU signal level < V
IL_nRST
(refer to its value in
Table 17) to reset the chip
50
2.8 Strapping Pins
ESP32-S3 has four strapping pins:
Espressif Systems 21
Submit Documentation Feedback
ESP32-S3 Series Datasheet v1.2