Specifications

MAINTENANCE
Page 128 MRC-565 Packet Data Radio Operations & Maintenance
TP TABLE
NO
TP
DESCRIPTION
1
89
5.000V
2
91
5.000V
3
120
3.300V
4
108
3.300V
5
115
1.800V
6
116
1.800V
7
100
1.500V
8
98
1.500V
9
110
3.600V
10
75
3.600V
11
105
1.800V_TX
12
99
1.800V_TX
13
32
3.300V_DSP_FPGA
14
69
3.300V_DSP_FPGA
15
3
3.300V_DSP_DSP
16
2
3.300V_DSP_DSP
17
113
2.500V_FPGA_PLL
18
117
2.500V_FPGA-PLL
19
47
1.200V_FPGA_CORE
20
48
1.200V_FPGA_CORE
21
37
1.600V_DSP_CORE
22
38
1.600V_DSP_CORE
23
88
3.300V_ETHERNET
24
96
3.300V_ETHERNET
25
103
1.800V_ADC1
26
50
1.800V_ADC2
27
137
3.300V_4360
1
46
25 MHZ CLOCK ETHERNET
2
66
25 MHZ CF
3
74
25 MHX CPL2
4
65
25 MHZ FLEX BUS
5
80
60MHZ CLOCK
6
87
19.200000MHZ CLOCK
7.3 Setting Up and Calibrating the MRC-565 Radio Parameters