Specifications
Table Of Contents
- EXPOSURE TO RF RADIATION
- MCC 545B MRC-565 DIFFERENCES
- 1 INTRODUCTION
- 2 NETWORKS
- 3 DESCRIPTION
- 4 INSTALLATION
- 4.1 Cable Connections
- 4.1.1 DC Power
- 4.1.2 VHF Antenna
- 4.1.3 GPS Antenna
- 4.1.4 I/O Port
- 4.1.5 GNSS Ethernet
- 4.1.6 Radio Ethernet Port
- 4.2 Power-Up Sequence
- 4.3 Description of Critical Device Parameters for a LOS Network
- 4.3.1 Device
- 4.3.2 Role
- 4.3.3 Radio ID Number
- 4.3.4 Frequency and Modulation Parameters
- 4.3.5 Select Site Name
- 4.4 Enter Script Files
- 4.5 RF TEST
- 5 OPERATIONS
- 5.1 Getting Started
- 5.1.1 Command Entry and Editing
- 5.1.2 HELP Command
- 5.1.3 System Time and Date
- 5.1.4 Factory Default Parameters
- 5.2 Configuring the MRC-565 Manually
- 5.2.1 Setting the Radio ID
- 5.2.2 Device Type
- 5.2.3 Setting the Operating Role
- 5.2.4 Setting the Power Mode
- 5.2.5 Selecting Network Parameters
- 5.3 Local Area Network Configuration
- 5.3.1 I/O Configuration Commands
- 5.3.2 Scheduling MRC-565 Events
- 5.3.3 Setting Timeout Duration
- 5.3.4 Defining Data Relays
- 5.3.5 Scaling A/D Readings
- 5.3.6 Selecting the Burst Monitor
- 5.3.7 Controlling the Hourly Statistics Report
- 5.3.9 Power Turn On
- 5.3.10 Saving and Restoring the Configuration
- 5.4 Sending and Receiving Messages
- 5.4.1 Entering and Deleting Messages
- 5.4.2 Editing Messages
- 5.4.3 Sending Messages
- 5.4.4 Sending Remote Commands
- 5.4.5 Sending Canned Messages
- 5.4.6 Receiving Messages
- 5.4.7 Examining Message Status
- 5.4.8 Examining and Revising Message Queues
- 5.5 Sensor I/O Port
- 5.6 Data Loggers Interface
- 5.7 CR10X Data Logger
- 5.7.5 Update Interval
- 5.7.6 Transmission Order
- 5.7.8 Time of Day
- 5.7.9 Time Tagging
- 5.7.10 Memory Management
- 5.7.11 Data Scaling
- 5.7.12 Modem Enable
- 5.7.13 Setting/Reading CR10X Internal Registers
- 5.7.14 Entering CR10X Security Codes
- 5.7.15 Downloading a CR10X .DLD Program
- 5.7.16 Replacing an MRC-565 to an Operational CR10X
- 5.7.17 Replaying Data from a CR10X
- 5.8 CR1000 Data Logger
- 5.8.1 CR1000 Driver Configuration Command Summary:
- 5.8.2 Acquire Mode:
- 5.8.3 Data Retrieval Pointer Initialization
- 5.8.4 Data Retrieval Hole Collection
- 5.8.5 Update Interval
- 5.8.6 Transmission Order
- 5.8.7 Group ID Assignment
- 5.8.8 Time of Day
- 5.8.9 Time Tagging
- 5.8.10 Memory Management
- 5.8.11 Data Scaling
- 5.8.12 Modem Enable
- 5.8.13 Reading CR1000 Internal Pointers and Error Statistics
- 5.8.14 Displaying Status Table Data
- 5.8.15 Displaying and Setting Public Table Data
- 5.8.16 Downloading a Program
- 5.9 SDI-12 Sensors
- 5.9.1 Data Collection
- 5.9.2 Setup
- 5.9.3 Periodic Data Collection
- 5.9.4 Data Logging
- 5.9.5 User Interface
- 5.9.6 MRC-565 Commands
- 5.9.7 SDI, CMD, COMMAND TEXT
- 5.9.8 SDI, TRACE, {OFF/ON}
- 5.9.9 SDI-12 Command/Response List
- 5.9.10 Serial Port Command and Response Diagrams
- 5.10 Generic Data Logger
- 5.10.1 Typical Report Formats
- 5.10.2 Setup and Configuration
- 5.10.3 Viewing the generic device driver setup
- 5.10.4 AUTO Format
- 5.10.5 MULTI-LINE Format
- 5.11 Event Programming
- 6 THEORY OF OPERATION
- 6.1 CMU (MRC-56500300-04)
- 6.1.1 Receiver Analog Front End
- 6.1.2 Digital Receiver Components
- 6.1.3 Digital Transmitter Components
- 6.1.4 Discrete Digital Output, Relay Junction and Analog Input
- 6.1.5 Power Amp Interface
- 6.2 Microprocessor
- 6.2.1 Overview
- 6.2.2 Cold Fire Processor
- 6.2.3 Data Input/Output
- 6.2.4 Coldfire Microprocessor Peripherals and Serial Configuration
- 6.2.5 Power Fail Detection/Protection
- 6.2.6 Voltage Regulators
- 6.2.6.1 Input Switching Regulator
- 6.2.6.2 CF Switching Regulator
- A three output switching regulator is used to generate the three voltages that power the Cold Fire Processor and its peripheral devices. The three voltage are:
- 3.3V Powers CF54455 I/O, CPLD, RS232 interfaces, Flash Memory, Ethernet Controller
- 6.2.6.3 DSP Switching Regulator
- A three output switching regulator is used to generate the three voltages that power all circuitry associated with the Receiver and Exciter circuitry. The three voltages are:
- 3.6V Powers FPGA and DSP I/O, Rx Clock synthesizer, RF Pre Amps, TCXO, and QDUC circuit.
- 2.0V Powers the ADC circuit, the FPGA Core (1.2V), and the DSP Core (1.6V)
- 6.2.6.4 5 V Regulator
- 6.3 Power Amplifier (MRC-56500301-10)
- 6.4 Internal GNSS daughter board (optional)
- 7 Maintenance
- APPENDIX A: COMMANDS
- MESSAGE COMMANDS
- MAINTENANCE COMMANDS
- BOOT
- DATA LOGGER COMMANDS
- CR10X COMMANDS
- COMMAND
- PARAMETERS
- CR10X,GROUP,source
- CR10X,RESET
- CR10X,SCALE,type
- CR10X,SIGNATURE
- CR10X,STAT
- CR10X,TIME,source
- CR1000
- CR1000,ACQMODE,{CURRENT,ALL,LAST,N}
- CR1000,SETPTR,MM/DD/YY,HH:MM
- CR1000,INTERVAL,{off,n}
- CR1000,GROUP,{CR1000}
- CR1000,TIME,{CR1000}
- CR1000,MAXQ,nnn
- CR1000,SCALE,{CR1000,INT}
- CR1000,PUBLIC
- CR10XTD,STAT
- CR10XTD,RESET
- CR10XTD,SECURITY,xxxx,yyyy,zzzz
- CUSTID,nnnnn
- 1 – 4095
- A-Z, 0-9, -
- A-Z, 0-9, -
- A-Z, 0-9, -
- Parameter
- BOOT
- MAINTENANCE COMMANDS
- STATUS COMMANDS
- STATION CONFIGURATION COMMANDS
- APPENDIX B: FACTORY DEFAULTS
- The following is a list of MRC 565 Parameters that are installed after typing:
- To obtain a list of parameters settings in SCRIPT format for the MRC 565 type:
- APPENDIX C: EVENT PROGRAMMING
- APPENDIX D: INSTALLATION DETAILS
MAINTENANCE
Page 121 MRC-565 Packet Data Radio Operations & Maintenance
6.2.4 Coldfire Microprocessor Peripherals and Serial Configuration
The MCF54455 Coldfire (CF) DMA-Supported Serial Peripheral Interface (DSPI) and its I2C
serial interface supply serial communications to external peripherals. The CF DSPI select outputs
are routed to the CPLD. The CPLD provides digital logic to produce serial chip selects.
When the radio is booted, the CF loads the FPGA hardware program and DSP firmware
programs via the CF DSPI. Utility ADC U12 is read via the DSPI. The RX Synth Clock U85, the
QDUC U63, and the high speed ADC U71 are configured by DSPI. Radio parameter serial
storage memory nonvolatile EEPROM U62 is read and written via DSPI. I2C is used to
configure clock ICs U51 and U60.
The CF Several peripherals are available on the MRC-565 microprocessor: 10-bit A/D converter,
a temperature sensor and a real time clock. Four channels of the A/D converter are utilized in the
transmitter/receiver hardware. The temperature sensor is connected to one channel of the A/D
converter and can be accessed directly by the user. The remaining 6 A/D converter channels are
accessible to the user . The third peripheral, a real time clock, is available for keeping system
time and time stamping critical events.
6.2.5 Power Fail Detection/Protection
The MRC-565 microprocessor utilizes a high precision analog threshold detector to determine
when power fails are occurring. A high priority interrupt is activated on the MCF 54455
processor when a pending power fail is detected after which the processor is guaranteed
approximately 1 msec to prepare for power failure. If no power failure actually occurs, the
internal watchdog wakes the MCF54455 in 45 seconds for normal operation. During an actual
power fail, the microprocessor restarts once system power returns.
6.2.6 Voltage Regulators
The CMU contains several voltage regulators, as described below. In addition to these regulators
there is a 3.3V Primary regulator that runs directly from the +10-16V input. This regulator
provides power for the Real Time Clock (RTC) chip U60 and the power ON control chips. This
voltage is powered on whenever the 10-16VDC is applied to the MRC 565. Its current drain
when all other regulators are power off is less than 2 ma. If power is disconnected from the unit
the RTC will loses its TOD and Alarm Clock settings and must be re set by the operator.
6.2.6.1 Input Switching Regulator
A Switching regulator chip is used to provide a stable 5.3 volt supply to all of the CMU circuits.
The input to this regulator is obtained from the +10-16V input from the PA Interface Connector.
The regulator is capable of supplying a minimum of 500 ma of current to the CMU. The
regulator operates at an efficiency exceeding 85%.
The Regulator can be powered down by a PWR-ON control signal, generated by the CPLD..