Specifications
In some configurations, the Power Mac G5 computer provides three PCI-X slots that interface to the
HyperTransport bus via the PCI-X bridge. One slot runs at a maximum of 133 MHz and two slots run at a
maximum of 100 MHz. The 133 MHz slot can support a maximum burst bandwidth of 1064 MBps, based on
64 bits times 133 MHz. The two 100 MHz slots can support a combined bandwidth of 800 MBps. It is
recommended that the highest bandwidth card be inserted in the 133 MHz PCI-X slot labeled slot 4.
Each slot has room for a full size 12.335-inch or short 6.926-inch card. The slots are numbered from 2 to 4 on
back panel, on the PCB, and in the Apple System Profiler. Slot one is the AGP.
Note: The Power Mac G5’s build-to-order NVIDIA GeForce 6800 Ultra DDL graphics card occupies
both the AGP slot and the adjacent PCI slot. As a result, you can install PCI expansion cards in the
slots labeled 3 and 4 but not in slot 2. To learn more about installing PCI cards, refer to the Power
Mac G5 User’s Guide that came with your computer. For more information on graphics cards and
PCI power availability, refer to Graphics Cards (page 28).
The connectors to the PCI or PCI-X slots are 3.3 V keyed and support 32-bit and 64-bit buses. The connectors
include a PME signal which allows a PCI card to wake the computer from sleep.
Note: 5 V keyed or signalling cards do not work in the Power Mac G5 computer.
The slots (12.335 inch) have a capture feature which is at the end of the slot. If a card exceeds the short length
it is recommended that the long length be used rather than an intermediate length, to assure the card stays
secure if and when the system is in shipment.
For more information, refer to PCI or PCI-X Expansion Slots (page 62).
HyperTransport Technology
The DDR HyperTransport is an advanced chip-to-chip communications technology that provides a high-speed,
high-performance, point-to-point link for integrated circuits. HyperTransport provides a universal connection
that reduces the number of buses within a system.
In the configuration without a PCI-X bridge, the HyperTransport bus between the U3H the K2 IC is 8 bits wide
in both directions and supports a total of 1.6 GBps bidirectional throughput.
In the configurations with a PCI-X bridge, the HyperTransport bus between the U3H IC and the PCI-X bridge
is 16 bits wide in both directions and supports a total of 4.8 GBps bidirectional throughput. Between the PCI-X
bridge and the K2 IC, the bus width is 8 bits, supporting total of 1.6 GBps bidirectional throughput.
Architecture
HyperTransport Technology
Retired Document | 2005-04-29 | Copyright © 2003, 2005 Apple Computer, Inc. All Rights Reserved.
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