Specifications
●
PCI-X bridge bus: some configurations support three 64-bit PCI-X slots: two 100 MHz and one 133 MHz
●
Internal PCI bus: 33 MHz, 64-bit bus supports the K2 I/O controller, the boot ROM, the AirPort Extreme
Card slot, the USB controller, and in some configurations the Bluetooth module
●
Serial ATA (SATA) buses: support 1.5 Gbps internal hard drive connectors
●
Ultra DMA ATA/100 bus: supports internal optical drive
●
HyperTransport: high-speed, bidirectional, point-to-point link for integrated circuits supports bidirectional
data rates up to 4.8 GBps, on applicable configurations
The remainder of this chapter describes the architecture of the processor module, the U3H memory controller
and bridge IC, the K2 I/O controller IC, and the USB controllers.
Processor Module
The dual processor Power Mac G5 contains two identical PowerPC G5 processor modules. Each processor
module is connected to the main logic board by a 300-pin connector. To achieve the required level of
performance, the signal lines that connect the processor module and the main logic board are carefully matched
in length, loading, and impedance.
PowerPC G5 Microprocessor
The PowerPC G5 used in the Power Mac G5 computer has the following features:
●
64-bit PowerPC implementation with 42-bit physical memory addressing
●
core runs at twice the bus speed
●
superscalar execution core supporting more than 200 in-flight instructions
●
two independent double-precision floating point units
●
Velocity Engine: 128-bit-wide vector execution unit
●
64K L1 instruction cache, 32K L1 data cache per processor
●
fully symmetric multiprocessing capability
●
built-in 512 KB backside L2 cache per processor
●
two independent, unidirectional 1.0 GHz to 1.35 GHz frontside buses each supporting up to 10.8 GBps
data throughput per processor
For more information, see the reference at PowerPC G5 Microprocessor (page 64).
Architecture
Processor Module
Retired Document | 2005-04-29 | Copyright © 2003, 2005 Apple Computer, Inc. All Rights Reserved.
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