Specifications

This chapter describes the architecture of the Power Mac G5. It includes information about the major components
on the logic boards: the microprocessor, the other main ICs, and the buses that connect them to each other
and to the I/O interfaces.
Block Diagram and Buses
The architecture of the Power Mac G5 is based on the PowerPC G5 microprocessor, and two custom ICs: the
U3H memory controller and bus bridge and the K2 I/O controller.
Figure 2-1 (page 18) is a simplified block diagram of the dual processor 2.0 GHz Power Mac G5. The diagram
shows the U3H and K2 ICs and the buses that connect them together.
Retired Document | 2005-04-29 | Copyright © 2003, 2005 Apple Computer, Inc. All Rights Reserved.
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Architecture