Specifications

CHAPTER 4
Expansion Features
46 RAM DIMMs
Table 4-3 describes the signals on the RAM DIMM connector.
RAM Address Multiplexing 4
Signals A[0–11] on each RAM DIMM make up a 12-bit multiplexed address bus that can
support several different types of DRAM devices. Table 4-4 shows the address
multiplexing modes used with several types of DRAM devices. The devices are
characterized by their bit dimensions; For example, a 512K by 8-bit device has 512K
addresses and stores 8 bits at a time.
Table 4-3 RAM DIMM connector signals
Signal name Description
A(0–11) Address inputs
/CAS(0–7) Column address strobe signals
DQ(0–63) Data input and output signals
ID(0–1) Memory module identification (not used)
/OE(0, 2) Output enable signals
PD(1–8) Presence detect signals
/PDE Presence detect enable signal (not used)
/RAS(0–3) Row address strobe signals
Reserved Reserved, don’t use
VCC +5 V power
VSS Ground
/WE(0, 2) Read/write input signals
Table 4-4 Address multiplexing modes for various DRAM devices
Device size Device type
Size of row
address
Size of column
address
4 Mbits 512K by 8 bits 10 9
4 Mbits 1 M by 4 bits 10 10
16 Mbits 1 M by 16 bits 10 10
16 Mbits 2 M by 8 bits 11 10
16 Mbits 2 M by 8 bits 12 9
16 Mbits 4 M by 4 bits 11 11