Specifications

CHAPTER 2
Architecture
Block Diagram and Main ICs 19
■ the ADB interface
■ management of system resets
■ management of the real-time clock
■ on/off control of the power supply (soft power)
■ the programming interface to devices on the IIC (interintegrated circuit) bus
The devices on the IIC bus include the AWACS sound IC, the digital video decoder and
scaler (DESC) on the video input module, and the Cyclops IC, which is the controller for
the remote control receiver. The computer reads and writes status and control
information to those devices by commands to the Cuda IC.
Valkyrie-AR IC 2
The Valkyrie-AR IC is a custom IC containing the logic for the video display. It includes
the following functions:
■ display memory controller
■ video CLUT (color lookup table)
■ video DAC (digital-to-analog converter)
A separate data bus handles data transfers between the Valkyrie-AR IC and the display
memory. The display memory data bus is 32 bits wide, and all data transfers consist of 32
bits at a time. The Valkyrie-AR IC breaks each 32-bit data transfer into several pixels of
the appropriate size for the current display mode—4, 8, or 16 bits per pixel. The
Valkyrie-AR IC does not support 24 bits per pixel.
To keep up with the large amount of data that must be transferred into and out of the
display memory, the Valkyrie-AR IC has several internal buffers. Besides input and
output buffers for display data, the Valkyrie-AR IC also has a buffer for both addresses
and data being sent from the main processor to the display. That buffer can hold up to
four transactions, allowing the main processor to complete a write instruction to the
display memory and continue processing without waiting for some other transaction
that might be taking place on the display memory bus.
The CLUT in the Valkyrie-AR custom IC provides color palettes for 4-bit and 8-bit
display modes. In 16-bit display mode, the CLUT is used to provide gamma correction
for the stored color values. With a black-and-white or monochrome display mode, all
three color components (R, G, and B) are the same.
The Valkyrie-AR IC uses several clocks. Its transactions with the CPU are synchronized
to the system bus clock. Data transfers from the frame-buffer DRAM are clocked by the
MEM_CLK signal, which runs at 60 MHz. Data transfers to the CLUT and the video
output are clocked by the dot clock, which has a different rate for different display
monitors.
For more information about the interaction between the Valkyrie-AR IC, the display
memory, and the main processor, see the section “Display RAM.”