User`s manual

1.1 System Components and Features
1.1.2 Memory Subsystem
The dynamic random-access memory (DRAM) provides 32MB to 512MB with
a 256-bit data bus. The memory is contained in one bank of eight commodity
single inline memory modules (SIMMs). Single- or double-sided SIMMs may
be used. Each SIMM is 36 bits wide, with 32 data bits and 4 check bits,
with 70 ns or less access. Table 1–1 lists the SIMM sizes supported and the
corresponding main memory size for 256-bit arrays.
Table 1–1 Main Memory Sizes
SIMM Size Eight SIMMs (256-Bit Array)
1M 36 32MB
2M 36 64MB
4M 36 128MB
8M
36 256MB
16M 36 512MB
All eight SIMM connectors (J3 through J10) must be populated. See Figure 2–3
and Table 2–2.
1.1.3 L3 Bcache Subsystem Overview
The board-level external L3 backup cache (Bcache) subsystem supports
multiple cache sizes and access times. Cache sizes supported are 2MB with
Alpha cache SIMMs populated with 128K 8 SRAMs, and 4MB and 8MB with
SIMMs populated with 512K 8 SRAMs. Speeds of 6 ns to 15 ns can be used.
The EB164 has a 2MB 10-ns Bcache SIMM. See Appendix A for order
information.
1.1.4 PCI Interface Overview
The EB164 PCI interface is the main I/O bus for the majority of functions
(SCSI interface, graphics accelerator, and so on). The PCI interface provides a
selectable PCI speed between 25 MHz and 33 MHz (based on the 21164 clock
divisor). An onboard PCI-to-ISA bridge is provided through an Intel 82378ZB
Saturn I/O (SIO) chip.
The PCI bus has three dedicated PCI expansion slots (one 64-bit and two
32-bit) and one shared 64-bit PCI/ISA slot.
Introduction to the EB164 1–3