Specifications

17 January 1997 – Subject to Change
System Address Mapping A–23
21164 Address Space
.
1
Missing entries (such as word size with
addr<6:5>
= 11
2
cause UNPREDICTABLE results.
2
Byte enable set to zero indicates that the byte lane carries meaningful data.
Table A–6 PCI Configuration Space Read/Write Encodings
Size Byte Offset 21164 PCI
Data-In
Register
addr<4:3> addr<6:5>
1
Instruction ad<1:0>
1
Byte
2
Enable
Byte Lanes
[7:0]
Byte
00
00
01
10
11
LDL, STL CFG<1:0>
CFG<1:0>
CFG<1:0>
CFG<1:0>
1110
1101
1011
0111
<0>
<1>
<2>
<3>
Word
01
00
01
10
LDL, STL CFG<1:0>
CFG<1:0>
CFG<1:0>
1100
1001
0011
<1:0>
<2:1>
<3:2>
Tribyte
10
00
01
LDL, STL CFG<1:0>
CFG<1:0>
1000
0001
<2:0>
<3:1>
Longword
11
00 LDL, STL CFG<1:0> 0000 <3:0>
Quadword
11
11 LDQ, STQ CFG<1:0> 0000 <7:0>