Specifications

17 January 1997 – Subject to Change
System Address Mapping A–1
A
System Address Mapping
This appendix describes the AlphaPC 164 motherboard’s CIA chip mapping of
40-bit 21164 physical addresses to memory addresses and I/O space addresses. It
also describes translation of a 21164-initiated address into a PCI address and
translation of a PCI-initiated address into a physical memory address.
Topics include dense and sparse address space
1
, PCI addressing, scatter-gather
address translation for DMA operations, and Industry Standard Architecture (ISA)
requirements.
A.1 Address Mapping Overview
The 21164 address space is divided into two regions, as shown in Figure A–1, using
physical address bit addr<39>. When clear, the 21164 access is to cacheable
memory space (partly reserved). When set, the 21164 access is to noncacheable
address space. The noncached address space is used for the CSRs, uncached
diagnostic memory access, and to access the memory-mapped PCI I/O address
space.
The PCI defines the following three physical address spaces:
•
A 64-bit PCI memory space
•
A 4GB PCI I/O space
•
A 256-byte-per-device PCI configuration space
In addition to these three PCI address spaces, the 21164 microprocessor’s noncached
space is also used to generate PCI interrupt acknowledge and special cycles.
1
Dense and sparse address spaces are defined in Section A.3.1 and Section A.3.2,
respectively.