Specifications

17 January 1997 – Subject to Change
vii
Figures
1–1
AlphaPC 164 Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . .
1–2
1–2
Division of Flash Blocks. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1–6
2–1
AlphaPC 164 Jumper/Connector/Component Location. . . . . . . . . . . . . .
2–2
2–2
AlphaPC 164 Configuration Jumpers . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–5
4–1
AlphaPC 164 L3 Bcache Array . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4–2
4–2
Main Memory Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4–4
4–3
AlphaPC 164 PCI Bus Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4–7
4–4
AlphaPC 164 ISA Bus Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4–10
4–5
Interrupt Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4–12
4–6
Interrupt/Interrupt Mask Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4–15
4–7
AlphaPC 164 System Clocks. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4–17
4–8
System Reset and Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4–20
4–9
Serial ROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4–22
4–10
AlphaPC 164 Power Distribution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4–23
5–1
Fan/Heat Sink Assembly . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5–6
A–1
21164 Address Space . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A–2
A–2
21164 Address Space Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . .
A–3
A–3
Address Space Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A–4
A–4
Address Mapping Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A–5
A–5
21164 and DMA Read and Write Transactions . . . . . . . . . . . . . . . . . . . .
A–7
A–6
Dense Space Address Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A–11
A–7
PCI Memory Sparse Space Address Generation (Region 1) . . . . . . . . .
A–16
A–8
PCI Memory Sparse Space Address Generation (Region 2) . . . . . . . . .
A–16
A–9
PCI Memory Sparse Space Address Generation (Region 3) . . . . . . . . .
A–17
A–10
PCI Sparse I/O Space Address Translation (Region A) . . . . . . . . . . . . .
A–18
A–11
PCI Sparse I/O Space Address Translation (Region B) . . . . . . . . . . . . .
A–19
A–12
PCI Configuration Space Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A–21
A–13
Byte/Word PCI Space . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A–27
A–14
PCI DMA Addressing Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A–32
A–15
PCI Target Window Compare . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A–33
A–16
Direct-Mapped Translation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A–34
A–17
Scatter-Gather PTE Format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A–36
A–18
Scatter-Gather Associative TLB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A–38
A–19
Scatter-Gather Map Translation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A–40
A–20
Default PCI Window Allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A–41
A–21
Memory Chip Select Signal (mem_cs_l) Decode Area . . . . . . . . . . . . . .
A–43
A–22
Memory Chip Select Signal (mem_cs_l) Logic . . . . . . . . . . . . . . . . . . . .
A–44
C–1
Special Header Content. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
C–5