Specifications

B–14 I/O Space Address Maps
Subject to Change – 17 January 1997
PCI Configuration Address Space
41 87.0008.0820 PCI arbiter control
42 87.0008.0840 PCI arbiter priority control
44 87.0008.0880 MEMCS# control
45 87.0008.08A0 MEMCS# bottom of hole
46 87.0008.08C0 MEMCS# top of hole
47 87.0008.08E0 MEMCS# top of memory
48 87.0008.0900 ISA address decoder control
49 87.0008.0920 ISA address decoder ROM block enable
4A 87.0008.0940 ISA address decoder bottom of hole
4B 87.0008.0960 ISA address decoder top of hole
4C 87.0008.0980 ISA controller recovery timer
4D 87.0008.09A0 ISA clock divisor
4E 87.0008.09C0 Utility bus chip select enable A
4F 87.0008.09E0 Utility bus chip select enable B
54 87.0008.0A80 MEMCS# attribute register #1
55 87.0008.0AA0 MEMCS# attribute register #2
56 87.0008.0AC0 MEMCS# attribute register #3
57 87.0008.0AE0 Scatter/gather relocation base address
80–81 87.0008.1008 BIOS timer base address
Table B–10 (Continued) SIO Bridge Configuration Address Space Map
Offset Address Register