Specifications

17 January 1997 – Subject to Change
I/O Space Address Maps B–13
PCI Configuration Address Space
B.4 PCI Configuration Address Space
The PCI configuration address space occupies physical addresses 87.0000.0000
through 87.1FFF.FFFF. The PCI configuration register set occupies this space. A
read or write access to this space causes a configuration read or write cycle on the
PCI. Table B–9 identifies the AlphaPC 164 PCI devices and the corresponding PCI
address bit that drives the device’s idsel pin. Refer to Section A.3.4 for additional
information on PCI configuration address space.
B.4.1 SIO PCI-to-ISA Bridge Configuration Address Space
Table B–10 is a map of SIO PCI-to-ISA bridge configuration address space. PCI
address bit pci_ad19 drives the idsel chip select pin for access to the configuration
register space.
Table B–9 Address Bits and PCI Device IDSEL Pins
PCI Device
PCI Address Bit Driving
IDSEL Pin Physical Address
PCI expansion slot 2 (J20)
pci_ad<16>
87.0005.0000
PCI expansion slot 0 (J29)
pci_ad<17>
87.0006.0000
PCI expansion slot 1 (J26)
pci_ad<18
> 87.0007.0000
SIO bridge
pci_ad<19>
87.0008.0000
PCI expansion slot 3 (J19)
pci_ad<20>
87.0009.0000
Reserved
pci_ad<21>
87.000A.0000
PCI IDE controller
pci_ad<22>
87.000B.0000
Table B–10 SIO Bridge Configuration Address Space Map
Offset Address Register
00–01 87.0008.0008 Vendor ID
02–03 87.0008.0048 Device ID
04–05 87.0008.0088 Command
06–07 87.0008.00C8 Device status
08 87.0008.0100 Revision ID
40 87.0008.0800 PCI control