Specifications

17 January 1997 – Subject to Change
I/O Space Address Maps B–11
PCI Dense Memory Space
B.3.2 Map of Flash ROM Memory
Table B–7 provides a map of flash ROM memory.
B.3.3 Flash ROM Configuration Registers
Table B–8 lists the configuration registers for the Intel 28F008SA 1MB flash ROM.
A read operation is performed by reading from the appropriate address.
To write data, the flash ROM must first be erased. The structure of the flash ROM
allows only the flash ROM to be erased in 64KB blocks (see Section B.3.2).
In order to change one byte, the following steps must be completed:
1. Read the entire 64KB block into system memory.
2. Change the desired byte in system memory.
3. Erase the 64KB block in flash ROM.
4. Write the entire 64KB block from system memory to the flash ROM.
Note:
In order to write to flash ROM, Jumper J31 (enable/disable) must be
positioned on pins 2 and 3 (see Figure 2–2 and schematic pc164.28).
1
Dense space addresses. Byte accesses are not possible using this space. Use sparse
space for finer granularity.
2
The block number is determined by the value in the flash ROM segment select register
(see Section B.2.1.2).
Table B–7 Map of Flash ROM Memory
Offset Physical Address
1
Block Number
2
Capacity
0.0000–0.FFFF 86.FFF8.0000–86.FFF8.FFFF 0,8 64KB
1.0000–1.FFFF 86.FFF9.0000–86.FFF9.FFFF 1,9 64KB
2.0000–2.FFFF 86.FFFA.0000–86.FFFA.FFFF 2,10 64KB
3.0000–3.FFFF 86.FFFB.0000–86.FFFB.FFFF 3,11 64KB
4.0000–4.FFFF 86.FFFC.0000–86.FFFC.FFFF 4,12 64KB
5.0000–5.FFFF 86.FFFD.0000–86.FFFD.FFFF 5,13 64KB
6.0000–6.FFFF 86.FFFE.0000–86.FFFE.FFFF 6,14 64KB
7.0000–7.FFFF 86.FFFF.0000–86.FFFF.FFFF 7,15 64KB