Specifications

B–8 I/O Space Address Maps
Subject to Change – 17 January 1997
PCI Sparse I/O Space
08D 85.C000.11A0 DMA page register reserved
08E 85.C000.11C0 DMA page register reserved
08F 85.C000.11E0 DMA low page register refresh
090 85.C000.1200 DMA page register reserved
092 85.C000.1240 Port 92
094 85.C000.1280 DMA page register reserved
095 85.C000.12A0 DMA page register reserved
096 85.C000.12C0 DMA page register reserved
098 85.C000.1300 DMA page register reserved
09C 85.C000.1380 DMA page register reserved
09D 85.C000.13A0 DMA page register reserved
09E 85.C000.13C0 DMA page register reserved
09F 85.C000.13E0 DMA low page register refresh
0A0 85.C000.1400 INT2 control
0A1 85.C000.1420 INT2 mask
0C0 85.C000.1800 DMA2 CH0 base and current address
0C2 85.C000.1840 DMA2 CH0 base and current count
0C4 85.C000.1880 DMA2 CH1 base and current address
0C6 85.C000.18C0 DMA2 CH1 base and current count
0C8 85.C000.1900 DMA2 CH2 base and current address
0CA 85.C000.1940 DMA2 CH2 base and current count
0CC 85.C000.1980 DMA2 CH3 base and current address
0CE 85.C000.19C0 DMA2 CH3 base and current count
0D0 85.C000.1A00 DMA2 status(r) and command(w)
0D2 85.C000.1A40 DMA2 write request
0D4 85.C000.1A80 DMA2 write single mask bit
Table B–5 (Continued) SIO Bridge Operating Register Address Space Map
Offset Address Register