Specifications

17 January 1997 – Subject to Change
I/O Space Address Maps B–1
B
I/O Space Address Maps
This appendix provides lists of the physical AlphaPC 164 I/O space assignments,
including CIA operating register address space maps and PCI/ISA device register
maps. Refer to Appendix A for detailed information on sparse/dense space and
address translation. The lists include only that portion that is unique to AlphaPC 164
and that affects or reflects the system environment. For full descriptions of all
AlphaPC 164 registers refer to the Digital Semiconductor 21164 Alpha
Microprocessor Hardware Reference Manual, the Digital Semiconductor 21172
Core Logic Chipset Technical Reference Manual, and applicable manufacturer’s
chip data sheets.
B.1 PCI Sparse Memory Space
There are three regions in the PCI sparse memory contiguous CPU address space:
•
Region 0 occupies physical addresses 80.0000.0000 through 83.FFFF.FFFF.
•
Region 1 occupies physical addresses 84.0000.0000 through 84.FFFF.FFFF.
•
Region 2 occupies physical addresses 85.0000.0000 through 85.7FFF.FFFF.
Refer to Section A.3.2 for additional information on PCI sparse memory space.
B.2 PCI Sparse I/O Space
There are two regions in the PCI sparse I/O contiguous CPU address space:
•
Region A occupies physical addresses 85.8000.0000 through 85.BFFF.FFFF.
•
Region B occupies physical addresses 85.C000.0000 through 85.FFFF.FFFF.
Refer to Section A.3.3 for additional information on PCI sparse I/O space.
B.2.1 PCI Sparse I/O Space-Region A
PCI sparse I/O space, Region A, occupies physical addresses 85.8000.0000 through
85.BFFF.FFFF. The ISA devices are included in this space. Section B.2.1.1 through
Section B.2.1.4 list the ISA device address maps.