Specifications

A–40 System Address Mapping
Subject to Change – 17 January 1997
PCI-to-Physical Memory Addressing
Figure A–19 Scatter-Gather Map Translation
33
n-11
Offset
Offset
03
000
00
Scatter-Gather
Table Address
00012021
63
000000000000000000
V
00
01
20
V
Physical
Memory
Address
DAC
Tag Addr<31:13>
32
13 12 02
Base
Offset
TAG Data
Scatter-Gather TLB
Scatter-Gather Map in Memory
ad_h<31:13>
sent to TLB
for PCI window
"hit."
DAC indicator
also sent.
LJ-04277.AI5
63 40
39
32
31
02
0000000000000000000
n-1
20 19
31
n-1
20
00000000
PCI LW
Address
Compare
Logic
W_DAC
Wn_BASE
Wn_MASK
0
33
n-11
10
Tn_BASE
000000000
XXXXX
Window
Hit
Tn_BASE Select
n-10
11111
n
n
1213
n-10