Specifications

17 January 1997 – Subject to Change
System Address Mapping A–29
PCI-to-Physical Memory Addressing
A.4 PCI-to-Physical Memory Addressing
This section describes direct and scatter-gather mapping through the use of windows.
A.4.1 Address Mapping Windows
PCI addresses coming into the CIA (32-bit or 64-bit) are mapped to the 21164
cached memory space (8GB). The CIA provides five programmable address
windows that control access of PCI peripherals to system memory. Each window
location is defined by its base register (Wn_BASE), and its size is defined by its
mask register (Wn_MASK). The five PCI address windows are also referred to as
the PCI target windows.
Mapping from the PCI address to a physical memory address can be direct (physical
mapping with an address offset) or scatter-gather (virtual mapping).
Windows [3:0]
Windows [3:0] have three registers associated with them. They are as follows:
•
PCI base register (Wn_BASE)
•
PCI mask register (Wn_MASK)
•
Translation base register (Tn_BASE)
In addition, there is an another register that is associated with window 3 only. It is
the PCI window DAC base register (W_DAC). It is used for PCI 64-bit addresses
(DAC).
Wn_MASK provides a mask corresponding to bits <31:20> of an incoming PCI
address. The size of each window can be programmed to be from 1MB to 4GB in
powers of two, by masking bits of the incoming PCI address using Wn_MASK as
shown in Table A–10.