User`s guide

i.MX53 System Development User’s Guide, Rev. 1
Freescale Semiconductor v
Contents
Paragraph
Number Title
Page
Number
Chapter 5
Setting up Power Management
5.1 i.MX53 Internal LDOs..................................................................................................... 5-1
5.2 Interfacing the i.MX53 Processor with the DA9053 ....................................................... 5-3
5.2.1 Connecting Power and Communication Signals ......................................................... 5-6
5.3 Interfacing the i.MX53 Processor with LTC3589-1 ........................................................ 5-9
5.3.1 Using the I
2
C Interface ................................................................................................ 5-9
5.3.2 I
2
C Acknowledge....................................................................................................... 5-10
5.4 Interface Table ............................................................................................................... 5-10
5.5 Connecting Power and Communication Signals ........................................................... 5-12
5.5.1 Powering-up the Interface.......................................................................................... 5-16
5.6 Additional Device Information...................................................................................... 5-17
5.6.1 DA9053...................................................................................................................... 5-17
5.6.2 LTC3589-1................................................................................................................. 5-20
Chapter 6
Interfacing DDR2 and DDR3 Memories with the i.MX53 Processor
6.1 i.MX53 SDRAM Controller Signals ............................................................................... 6-1
6.2 i.MX53 Memory Interface............................................................................................... 6-3
6.3 Configuring the DDR2 JTAG Script................................................................................ 6-4
6.4 Configuring the DDR3 JTAG Script................................................................................ 6-7
6.5 Configuring the i.MX53 Registers for the Initialization Script..................................... 6-10
6.5.1 Main Control Register ............................................................................................... 6-10
6.5.2 Power Down Register................................................................................................ 6-11
6.5.3 Timing Configuration 0 Register .............................................................................. 6-11
6.5.4 Timing Configuration 1 Register .............................................................................. 6-12
6.5.5 Timing Configuration 2 Register .............................................................................. 6-13
Chapter 7
Avoiding Board Bring-Up Problems
7.1 Using a Voltage Report to Avoid Power Pitfalls.............................................................. 7-1
7.2 Using a Current Monitor to Avoid Power Pitfalls ........................................................... 7-2
7.3 Checking for Clock Pitfalls.............................................................................................. 7-2
7.4 Avoiding Reset Pitfalls .................................................................................................... 7-2
7.5 Sample Board Bring-Up Checklist .................................................................................. 7-3