User`s guide

i.MX53 System Development User’s Guide, Rev. 1
Freescale Semiconductor 18-1
Chapter 18
Supporting the i.MX53 Reference Board DISP0 LCD
This chapter explains how to support a new LCD on an i.MX53-based board, using display port 0. There
are two options for adding support for a new LCD panel without modifying the BSP: letting the BSP
calculate the timings using VESA defaults or reducing the blanking time. VESA and reduced blanking
work for many LCDs but fail for some devices because of timing configuration constraints. For those
devices, we need to modify the BSP and set the proper timing values. Modifying the boot arguments also
allows us to include support for the new driver from LTIB device driver menu, call initialization routines,
and load the driver by using the boot arguments.
This chapter focuses on the synchronous Parallel0 RGB interface. Common display cards can be attached
to this interface. It provides connectivity for the Chunghwa CLAA057VA01CT VGA LCD and the
Chunghwa CLAA070VC01 WVGA LCD panel.
Be aware that the DI RGB interface is multiplexed with all other asynchronous parallel interfaces.
Therefore, users cannot send data to a synchronous display and another asynchronous parallel display
device at the same time in the same DI. Instead, the i.MX53 sends data to the asynchronous panel (smart
display) while the synchronous interface is inactive (during horizontal and vertical back porch and front
porches). For this reason, the smart display’s frame rate can be affected when multiple displays are
attached to the i.MX53.