User`s guide

Configuring the IOMUX Controller (IOMUXC)
i.MX53 System Development User’s Guide, Rev. 1
13-2 Freescale Semiconductor
– PUS (2 bits pull up/down configuration value)—Selects between pull up or down and its
value.
– PUE (1 bit pull/keep select)—Selects between pull up or keeper. A keeper circuit help assure
that a pin stays in the last logic state when the pin is no longer being driven.
– PKE (1 bit enable/disable pull up, pull down or keeper capability)—Enable or disable pull
up, pull down, or keeper.
– DDR_MODE_SEL (1 bit ddr_mode control)—Needed when interfacing DDR memories.
– DDR_INPUT (1 bit ddr_input control)—Needed when interfacing DDR memories.
13.2 Setting Up the IOMUXC and U-Boot
To setup the IOMUXC and configure the pads on U-Boot, use the four files described in Table 13-1:
13.2.1 Defining the Pads
The iomux.c file contains each pad’s IOMUXC definitions. Use the following code to see the default
definitions:
enum iomux_pins {
...
...
...
MX53_PIN_GPIO_19 = _MXC_BUILD_GPIO_PIN(3, 5, 1, 0x20, 0x348),
MX53_PIN_KEY_COL0 = _MXC_BUILD_GPIO_PIN(3, 6, 1, 0x24, 0x34C),
MX53_PIN_KEY_ROW0 = _MXC_BUILD_GPIO_PIN(3, 7, 1, 0x28, 0x350),
...
...
...
}
To change the values for each pad according to your hardware configuration, use the following:
MX53_PIN_<PIN NAME> = _MXC_BUILD_GPIO_PIN(gp, gi, ga, mi, pi)
Where:
• gp—IO Pin
• gi—IO Instance
• ga—MUX Mode
• mi—MUX Control Offset
Table 13-1. Configuration Files
Path Filename Description
cpu/arm_cortexa8/mx53/ iomux.c Iomux functions (no need to change)
include/asm-arm/arch-mx53/ iomux.h Iomux definitions (no need to change)
include/asm-arm/arch-mx53/ mx53_pins.h Definition of all processor's pads
board/freescale/mx53_<reference board name>/ mx53<reference board name>.c Board initialization file