User`s guide

i.MX53 System Development User’s Guide, Rev. 1
Freescale Semiconductor xiv
Tables
Table
Number Title
Page
Number
Tab le s
1-1 Design Checklist ..................................................................................................................... 1-1
1-2 DDR Vref Resistor Sizing Guideline...................................................................................... 1-8
1-3 I
2
C Bus Example Spreadsheet ................................................................................................ 1-9
1-4 I
2
C Port Usage Scenario ......................................................................................................... 1-9
1-5 JTAG Interface Summary ..................................................................................................... 1-10
1-6 Additional JTAG Signals ......................................................................................................1-10
2-1 DDR2/DDR3 Routing by the Same Length............................................................................ 2-6
2-2 DDR2/DDR3 Routing by Byte Group.................................................................................... 2-7
2-3 Total Signal Etch (DDR2) .................................................................................................... 2-18
2-4 Total Signal Etch (DDR3).....................................................................................................2-26
3-1 Header Information................................................................................................................. 3-2
3-2 Component and Pin Information............................................................................................. 3-2
3-3 Ramp and Waveform Keywords............................................................................................. 3-5
3-4 Golden Waveform Keywords.................................................................................................. 3-7
3-5 Unmodeled Analog or Special Interface Pins....................................................................... 3-10
3-6 Unmodeled Differential Signals............................................................................................ 3-10
5-1 i.MX53 Voltage Rails and Associated DA9053 Regulator..................................................... 5-4
5-2 i.MX53 Voltage Rails and Associated LTC3589-1 Regulator .............................................. 5-10
5-3 Generated Supply Domains .................................................................................................. 5-19
5-4 LTC3589-1 Supply Domains ................................................................................................ 5-21
7-1 Sample Voltage Report............................................................................................................ 7-1
7-2 Board Bring-Up Checklist ...................................................................................................... 7-3
8-1 Clock Roots............................................................................................................................. 8-1
12-1 Android Enhancements......................................................................................................... 12-5
13-1 Configuration Files ............................................................................................................... 13-2
13-2 IOMUX Configuration Files................................................................................................. 13-4
14-1 Available Files—First Set ..................................................................................................... 14-2
14-2 Available Files—Second Set................................................................................................. 14-3
14-3 Available Files—Third Set.................................................................................................... 14-3
15-1 Structure Descriptions........................................................................................................... 15-2
15-2 ESDHC Pins.......................................................................................................................... 15-6
15-3 ESDHC Operation Modes..................................................................................................... 15-7
16-1 Parameter Variables............................................................................................................... 16-1
16-2 Device Information ............................................................................................................... 16-2
16-3 CSPI Parameters ................................................................................................................... 16-3
17-1 Files for Adding/Configuring a New Keypad....................................................................... 17-1
18-1 Available Interfaces............................................................................................................... 18-2
18-2 Timing Parameters ................................................................................................................ 18-4
18-3 Parameter Information .......................................................................................................... 18-5
18-4 XGA DVI Monitor Example Variables................................................................................. 18-6
18-5 VGA LCD Example Variables.............................................................................................. 18-7