Datasheet

Functional Description
Version 1.6, February 28, 2006 Proprietary to OmniVision Technologies 5
O
mni ision
output, the OV2640 will output continuous live video data
unless in single frame transfer mode. Figure 18 and
Figure 19 show the detailed timing and Table 11 shows
the timing specifications for this mode.
Frame Rate Adjust
The OV2640 offers three methods for frame rate
adjustment:
• Clock prescaler: (see “CLKRC” on page 23)
By changing the system clock divide ratio and PLL,
the frame rate and pixel rate will change together.
This method can be used for dividing the frame/pixel
rate by: 1/2, 1/3, 1/4 … 1/64 of the input clock rate.
• Line adjustment: (see “REG2A” on page 26 and
“FRARL” on page 26)
By adding a dummy pixel timing in each line
(between HSYNC and pixel data out), the frame rate
can be changed while leaving the pixel rate as is.
• Vertical sync adjustment:
By adding dummy line periods to the vertical sync
period (see “ADDVSL” on page 26 and “ADDVSH”
on page 26 or see “FLL” on page 27 and “FLH” on
page 27), the frame rate can be altered while the
pixel rate remains the same.
Frame Rate Timing
Default frame timing is illustrated in Figure 15, Figure 16,
and Figure 17. Refer to Table 1 for the actual pixel rate at
different frame rates.
Digital Signal Processor (DSP)
This block controls the interpolation from Raw data to
RGB and some image quality control.
• Edge enhancement (a two-dimensional high pass
filter)
• Color space converter (can change Raw data to RGB
or YUV/YCbCr)
• RGB matrix to eliminate color cross talk
• Hue and saturation control
• Programmable gamma control
• Transfer 10-bit data to 8-bit
• White pixel canceling
• De-noise
Table 1 Frame/Pixel Rates in UXGA Mode
Frame Rate (fps) 15 7.5 2.5 1.25
PCLK (MHz) 36 18 6 3
Output Formatter
This block controls all output and data formatting required
prior to sending the image out.
Scaling Image Output
The OV2640 is capable of scaling down the image size
from CIF to 40x30. By using SCCB registers, the user can
output the desired image size. At certain image sizes,
HREF is not consistent in a frame.
Compression Engine
As shown in Figure 7, the Compression Engine consists
of three major blocks:
• DCT
•QZ
• Entropy Encoder
Figure 7 Compression Engine Block Diagram
Microcontroller
The OV2640 embeds an 8-bit microcontroller with
512-byte data memory and 4 KB program memory. It
provides the flexibility of decoding protocol commands
from the host for controlling the system, as well as the
ability to fine tune image quality.
SCCB Interface
The Serial Camera Control Bus (SCCB) interface controls
the CAMERACHIP operation. Refer to OmniVision
Technologies Serial Camera Control Bus (SCCB)
Specification for detailed usage of the serial control port.
Slave Operation Mode
The OV2640 can be programmed to operate in slave
mode (default is master mode).
When used as a slave device, COM7[3] (0x12), CLKRC[6]
(0x11), and COM2[2] (0x09) register bits should be set to
DCT QZ Entropy Encoder
Q-Table H-Table Marker
Video Data
Scale Factor
Compressed
Stream
Compression Engine