Datasheet
Table Of Contents
- General Description
- Features
- Ordering Information
- Applications
- Key Specifications
- Functional Description
- Figure 2 Functional Block Diagram
- Image Sensor Array
- Analog Amplifier
- 10-Bit A/D Converters
- Channel Balance
- Black Level Compensation
- Windowing
- Timing Generator and Control Logic
- Digital Signal Processor (DSP)
- Output Formatter
- Compression Engine
- Microcontroller
- SCCB Interface
- Strobe Mode
- Reset
- Power Down Mode
- Digital Video Port
- Pin Description
- Electrical Characteristics
- Timing Specifications
- Figure 13 SCCB Interface Timing Diagram
- Table 9 SCCB InterfaceTiming Specifications
- Figure 14 UXGA, SVGA, and CIF Line/Pixel Output Timing
- Table 10 Pixel Timing Specifications
- Figure 15 UXGA Frame Timing
- Figure 16 SVGA Frame Timing
- Figure 17 CIF Mode Frame Timing
- Figure 18 Frame Exposure Mode Timing with EXPST_B Staying Low
- Figure 19 Frame Exposure Mode Timing with EXPST_B Asserted
- Table 11 Frame Exposure Timing Specifications
- OV2640 Light Response
- Register Set
- Package Specifications
- Revision History
O
mni
TM
ision
REVISION CHANGE LIST
Document Title: OV2640 Datasheet Version: 1.01
DESCRIPTION OF CHANGES
The following changes were made to version 1.0:
• Under Key Specifications on page 1, changed specification for Core Power Supply from
“1.2VDC + 10%” to “1.2VDC + 5%”
• Under Key Specifications on page 1, changed specification for Analog Power Supply
from “2.8VDC +
10%” to “2.5 ~ 3.0VDC”
• Under Key Specifications on page 1, changed specification for I/O Power Supply from
“1.8V to 3.3V” to “1.7V to 3.3V”
• On pages 17 to 20, changed title of Table 12 from “Device Control Register (for 0x00 ~
0xFF at 0xF8 = 00 and 0xFF = 00)” to “Device Control Register (when 0xFF = 00)”
• On pages 21 to 27, changed title of Table 13 from “Device Control Register (for 0x00 ~
0x7E at 0xF8 = 01 and 0xFF = 7F)” to “Device Control Register (when 0xFF = 01)”
• In Table 12 on pages 18, changed description of register CTRL3 (0x87) from:
Module Enable
Bit[7:6]: Reserved
Bit[5]: DCW
Bit[4]: SDE
Bit[3]: UV_ADJ
Bit[2]: UV_AVG
Bit[1]: Reserved
Bit[0]: CMX
to
Module Enable
Bit[7]: BPC
Bit[6]: WPC
Bit[5:0]: Reserved
• In Table 15 on page 30, changed specification for Peak Temperature from “Greater than
245°C” to “245°C”