Datasheet

20 Proprietary to OmniVision Technologies Version 1.6, February 28, 2006
OV2640 Color CMOS UXGA (2.0 MegaPixel) OmniPixel2™ CAMERACHIP™
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D3 R_DVP_SP 82 RW
Bit[7]: Auto mode
Bit[6:0]: DVP output speed control
DVP PCLK = sysclk (48)/[6:0] (YUV0);
= sysclk (48)/(2*[6:0]) (RAW)
D4-D9 RSVD XX – Reserved
DA IMAGE_MODE 00
Image Output Format Select
Bit[7]: Reserved
Bit[6]: Y8 enable for DVP
Bit[5]: Reserved
Bit[4]: JPEG output enable
0: Non-compressed
1: JPEG output
Bit[3:2]: DVP output format
00: YUV422
01: RAW10 (DVP)
10: RGB565
11: Reserved
Bit[1]: HREF timing select in DVP JPEG output mode
0: HREF is same as sensor
1: HREF = VSYNC
Bit[0]: Byte swap enable for DVP
0: High byte first YUYV (C2[4]=0)
YVYU (C2[4] = 1)
1: Low byte first UYVY (C2[4] =0)
VYUY (C2[4] =1)
DB-DF RSVD XX – Reserved
E0 RESET 04 RW
Reset
Bit[7]: Reserved
Bit[6]: Microcontroller
Bit[5]: SCCB
Bit[4]: JPEG
Bit[3]: Reserved
Bit[2]: DVP
Bit[1]: IPU
Bit[0]: CIF
E1-EF RSVD XX – Reserved
F0 MS_SP 04 RW SCCB Master Speed
F1-F6 RSVD XX – Reserved
F7 SS_ID RW SCCB Slave ID
Table 12 Device Control Register List (when 0xFF = 00) (Sheet 3 of 4)
Address
(Hex)
Register
Name
Default
(Hex)
R/W Description