Datasheet

Table Of Contents
Register Set
Version 1.6, February 28, 2006 Proprietary to OmniVision Technologies 19
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7D BPDATA[7:0] 00 RW SDE Indirect Register Access: Data
7E-85 RSVD XX Reserved
86 CTRL2 0D RW
Module Enable
Bit[7:6]: Reserved
Bit[5]: DCW
Bit[4]: SDE
Bit[3]: UV_ADJ
Bit[2]: UV_AVG
Bit[1]: Reserved
Bit[0]: CMX
87 CTRL3 50 RW
Module Enable
Bit[7]: BPC
Bit[6]: WPC
Bit[5:0]: Reserved
88-8B RSVD XX Reserved
8C SIZEL[5:0] 00 RW {HSIZE[11], HSIZE[2:0], VSIZE[2:0]}
8D-BF RSVD XX Reserved
C0 HSIZE8[7:0] 80 RW Image Horizontal Size HSIZE[10:3]
C1 VSIZE8[7:0] 60 RW Image Vertical Size VSIZE[10:3]
C2 CTRL0 0C RW
Module Enable
Bit[7]: AEC_EN
Bit[6]: AEC_SEL
Bit[5]: STAT_SEL
Bit[4]: VFIRST
Bit[3]: YUV422
Bit[2]: YUV_EN
Bit[1]: RGB_EN
Bit[0]: RAW_EN
C3 CTRL1 FF RW
Module Enable
Bit[7]: CIP
Bit[6]: DMY
Bit[5]: RAW_GMA
Bit[4]: DG
Bit[3]: AWB
Bit[2]: AWB_GAIN
Bit[1]: LENC
Bit[0]: PRE
C4-D2 RSVD XX Reserved
Table 12 Device Control Register List (when 0xFF = 00) (Sheet 2 of 4)
Address
(Hex)
Register
Name
Default
(Hex)
R/W Description