Installation Instructions
Table Of Contents
- Contents
- List of Table
- List of Figures
- 1 About this document
- 2 Product Overview
- 3 Mechanical Dimensions
- 4 Interface description
- 4.1 Pin Definition
- 4.2 Operating conditions
- 4.3 Digital logic characteristics
- 4.4 Power interface
- 4.5 USIM card interface
- 4.6 PCM interface
- 4.7 USB2.0 interface
- 4.8 UART interface
- 4.9 SPI interface
- 4.10 I2C interface
- 4.11 Network light
- 4.12 System Status Indication
- 4.13 Flight Mode
- 4.14 Forced USB download interface
- 4.15 SD card interface
- 4.16 SDIO_WIFI/EMMC interface
- 4.17 PCIe interface
- 4.18 RMII/RGMII interface
- 4.19 AUDIO interface
- 4.20 ADC
- 4.21 GPIOs
- 4.22 Power on/off and reset interface
- 4.23 Antenna interface
- 5 Product characteristics
- 6 Design Guideline
- 7 Storage, Production and Package
- 8 Safety Information
- 空白页面
- 空白页面
L508 Hardware Design
Copyright© Shanghai Mobiletek Communication Ltd 62
124 PCIE_TXP AO Differential transmit data signal positive
125 PCIE_TXN AO Differential transmit data signal negative
126 PCIE_RXP AI Differential receive data signal positive
127 PCIE_RXN AI Differential receive data signal negative
128 PCIE_REFCLK_P AO Reference clock signal positive
129 PCIE_REFCLK_N AO Reference clock signal negative
4.17.2 PCIe reference design
PCIE needs differential routing, data and clock routing impedance difference of 100ohm, equal length
control within 3mm, good isolation protection
MODULE
PCIE_TXP
WIFI
VDD1V8
PCIE_WK_IN
HSIP
PCIE_REFCLK_P
REF_CLK_P
PCIE_RXP
HSIN
WLAN_CLK
WLAN_CMD
PCIE_RSTN
UART_DCD
PCIE_CHIP_EN
HSOP
R EF_CLK _N
PCIE_REFCLK_N
HSON
XI
XO
VDD3.3V
VDD
ANT
TX
RX
A4
A2
A1
A3
B4
B2
B1
B3
OE
VCCB
GND
TXS0104EPWR
VCCA
PCIE_TXN
PCIE_RXN
0.1uF
0.1uF
XTALP
XTALN
Figure 33 PCIe reference design
4.18 RMII/RGMII interface