L508 Hardware Design L508 Hardware Design LTE Module Series Version： V1.0.
L508 Hardware Design Notice Some features of this product and its accessories depend on installed software, local network capabilities and settings, and some features may not be activated or restricted due to local network operators or network service providers. As a result, the description in this article may not be an exact match to the product you purchased or its accessories. The company shall not be responsible for the loss of property or personal injury caused by the user's improper operation.
L508 Hardware Design Version History Date Version Description of change Author 2021-01-29 V1.0 Initial g.zhong 2021-03-20 V1.0.1 Update band information robin 2021-04-17 V1.0.2 Change the Module operating voltage Change 130,131pin to UART Exchange function of 3,86pin Update function of the RESET Add EMMC design g.zhong 2021-04-26 V1.0.3 2021-07-15 V1.0.4 2021-08-31 V1.0.5 Add L508LA configuration information g.zhong 2021-09-14 V1.0.6 Add L508 storage and baking information g.
L508 Hardware Design Contents CONTENTS ...................................................3 LIST OF TABLE ..............................................6 LIST OF FIGURES ............................................8 1 ABOUT THIS DOCUMENT ...............................10 1.1 Applicable scope ................................................................................................................................ 10 1.2 Writing purpose ..................................................................
L508 Hardware Design 4.4.3 Power Supply Design Guide .............................................. 38 4.4.4 Charging circuit design reference ......................................... 39 4.5 USIM card interface............................................................................................................................ 40 4.5.1 Pin Description .......................................................... 40 4.5.2 Electrical characteristics .................................................
L508 Hardware Design 4.20 ADC ...................................................................................................................................................... 68 4.21 GPIOs .................................................................................................................................................. 69 4.22 Power on/off and reset interface .................................................................................................. 71 4.22.1 Pin Description ..
L508 Hardware Design List of Table Table 1 support document list................................................................................................................. 11 Table 2 Terms and Abbreviation ............................................................................................................. 11 Table 3 key performance parameter...................................................................................................... 13 Table 4 working frequency band ................
L508 Hardware Design Table 43 Normal working voltage of module ........................................................................................ 81 Table 44 working mode ........................................................................................................................... 82 Table 45 VBAT consumption current (VBAT = 3.8V)........................................................................... 83 Table 46 Operating temperature ..................................................
L508 Hardware Design List of Figures Figure 1 L508E Functional Block Diagram ........................................................................................... 17 Figure 2 L508LA Functional Block Diagram ......................................................................................... 18 Figure 3 L508LA Functional Block Diagram ......................................................................................... 19 Figure 4 Top, Bottom, Sides Dimensions (Unit: mm) .....................
L508 Hardware Design Figure 44 Main antenna matching circuit schematic........................................................................... 77 Figure 45 DRX antenna matching circuit schematic ........................................................................... 78 Figure 46 GNSS antenna matching circuit schematic ........................................................................ 79 Figure 47 antenna feed point................................................................................
L508 Hardware Design 1 About this document 1.1 Applicable scope This document describes the L508 series 4G LTE LCC+LGA Module (hereinafter referred to as L508), the basic specifications, product electrical characteristics, design guidance and hardware interface development guidance. Users need to follow this documentation requirements and guidance for design. This document applies only to L508 products in the application development. 1.
L508 Hardware Design Table 1 support document list NO. Documents 1 《L508 AT Command User Guide》 2 《L508_SPEC.docx》 3 《L508EVBUserManual》 4 《L508 Schematic checklist》 5 《L508 Layout checklist》 6 《L508_Reference Design.pdf》 7 《L508_DECAL.sch》 8 《L508_DECAL.PCB》 1.
L508 Hardware Design LED Light Emitting Diode GPIO General-purpose Input/Output GSM Global Standard for Mobile Communications GPRS General Packet Radio Service CDMA Code Division Multiple Access WCDMA Wideband Code Division Multi Access UMTS Universal Mobile Telecommunication System HSDPA High Speed Downlink Packet Access HSUPA High Speed Uplink Packet Access AGPS Assisted Global Positioning System BER Bit Error Rate DL Downlink COEX WLAM/LTE-ISM coexistence SMPS Switched-mode po
L508 Hardware Design 2 Product Overview This product is an LCC+LGA interface LTE (support to CAT4) wireless communication module, which supports data connection of TDD-LTE/FDD-LTEUMTS/HSDPA/HSPA+/GSM/GPRS/EDGE network. The external size of the module is 30mm×30mm, which can meet almost all M2M and IoT applications, including vehicle tracking, security systems, wireless POS, industrial PDA, intelligent metering, remote maintenance control and so on. 2.
L508 Hardware Design WCDMA B8 √ √ √ √ LTE-FDD B1 √ √ √ √ √ √ √ √ √ √ √ √ √ √ √ √ √ √ √ √ CAT4 CAT4 CAT4 √ √ √ √ LTE-FDD B2 LTE-FDD B3 √ √ √ LTE-FDD B4 LTE-FDD B5 √ √ LTE-FDD B7 √ √ LTE-FDD B8 √ √ LTE-FDD B20 √ LTE-FDD B28 √ √ √ LTE-FDD B66 LTE-TDD B34 LTE-TDD B38 √ LTE-TDD B39 LTE-TDD B40 √ LTE-TDD B41 √ Category CAT4 GNSS √ LTE-FDD Characteristic Uplink up 50Mbps；Downlink up 150Mbps HSPA+ Characteristic WCDMA-HSPA+：Uplink up 5.
L508 Hardware Design SPI*1 general purpose SPI communications and LCD support MMC SDIO interface, support SD, MMC, SDIO, CE-ATA Card SDIO*2 Support 1.8/3.0V interface WIFI SDIO interface, support SDIO2.0&3.0 standard Support 1.8V interface PCIe Ethernet Supports PCIE Gen 1 mode for WIFI interface Max Speed: PCIe Gen 1 (2.5Gbps raw rate) Supports 10/100Mbps working mode Support 1.8/3.
L508 Hardware Design L508LA/L508C: Voltage detection range 0-1.8 V, temperature drift is large, precision requirements are not high can be used Antenna interface Main Antenna, Diversity antenna, GNSS antenna Dimensions Physical characteristics L508E/L508LA/L508C: 30mm*30mm*2.5mm L508TLC: 30mm*30mm*2.7mm Physical characteristics Encapsulation：LCC+LGA Note: Some hardware features integrated in L508 devices must be enabled through software.
L508 Hardware Design 2.
L508 Hardware Design VBAT_RF VBAT_BB PWRKEY VAON B40 LDO_USIM PMU LDO_1V8 TX SAW B38/ 41 TX SAW B7 RF PA B1 SP2T SWITCH NOR FLASH Duplexer Duplexer Duplexer B3 26M DCXO B5 Duplexer B28 Duplexer B34/ 39 RESET B38/ 40/41 WLAN SDIO UART RX SAW 2G_HB USIM TX SAW LNA B40 B7 B4&B66 B8 B1 B3 B5 B28 B34/ 39 SD RF SWITCH Duplexer RFFE HB MB LB GSM GPRS EDGE PA +SWITCH ANT_DRX 3G/LTE B8 ANT_MAIN Duplexer B4&B66 2G_LB RFFE USB RMII CPU PCIE EAR MIC ADC B40 RX SAW B38/
L508 Hardware Design ADC*2 PWRKEY VBAT_RF VBAT_BB VAON B40 LDO_USIM PMU LDO_1V8 TX SAW B38/ 41 TX SAW B7 RF PA B1 SP2T SWITCH NAND FLASH Duplexer Duplexer Duplexer B3 26M DCXO B5 Duplexer B28 Duplexer B34/ 39 RESET B38/ 40/41 RF SWITCH Duplexer RFFE HB MB LB GSM GPRS EDGE PA +SWITCH ANT_DRX 3G/LTE B8 ANT_MAIN Duplexer B28 TX SAW LNA SD B7 B28 B8 B1 B3 B5 B28 B34/ 39 WLAN SDIO UART RX SAW 2G_HB USIM 2G_LB RFFE USB RMII CPU PCIE EAR MIC RMII_LDO MIC_BIAS B40
L508 Hardware Design The working frequency range of the transceiver of this module is shown in Table 4.
L508 Hardware Design GPS L1 BAND 1574.4～1576.44 MHz GLONASS 1598～1606 MHz BEIDOU B1 1559.05～1563.14 MHz Table 5 Conducted transmission power Working band Maximum power Minimum Power UMTS850 24dBm +1/-3dB <-50dBm UMTS900 24dBm +1/-3dB <-50dBm UMTS1900 24dBm +1/-3dB <-50dBm UMTS2100 24dBm +1/-3dB <-50dBm GSM900 33dBm ±2dB 5dBm ± 5dB DCS1800 30dBm ±2dB 0dBm ± 5dB GSM900(8-PSK) 27dBm ±3dB 5dBm ± 5dB DCS1800(8-PSK) 26dBm +3/-4dB 0dBm ± 5dB FDD_LTE B1 23dBm +/-2.
L508 Hardware Design TDD_LTE B41 23dBm +/-2.7dB <-40dBm Table 6 Conducted reception sensitivity Working band Receiving sensitivity (Typical) Receiving sensitivity (MAX) WCDMA B1 < -109dBm 3GPP WCDMA B4 < -109dBm 3GPP WCDMA B5 < -109dBm 3GPP WCDMA B5 < -109dBm 3GPP WCDMA B8 < -109dBm 3GPP GSM900 < -109dBm 3GPP DCS1800 < -108dBm 3GPP Table 7 Reference sensitivity (QPSK) Bandwidth E-UTRA Frequency 1.
L508 Hardware Design 3 Mechanical Dimensions This module is 135-PIN LCC+LGA packaging module. The package size is 30*30mm. The Pin 1 position is identified by a ground pad with a triangle at the bottom. 3.1 Mechanical Dimensions of Module Figure 4 Top, Bottom, Sides Dimensions (Unit: mm) 3.2 Recommended Footprint The recommended soldering pads are as follows, which can also be obtained directly from our company.
L508 Hardware Design Figure 5 Recommended Footprint (Unit: mm) 3.
L508 Hardware Design 4 Interface description 4.1 Pin Definition 4.1.1 Pin I/O parameter definition The I/O parameter definition for this product is shown in Table 8. Table 8 I/O parameter definitions Pin attribute symbol Description PI Power input PO Power output AI Analog input AO Analog output B Digital Signal input/output DI Digital input DO Digital signal output USIM_VDD SIM card power RMII_LDO RMII interface power B_PD Digital bidirectional.
L508 Hardware Design L508 TOP POWER ADC ANT AUDIO USIM USB SPI SD PCIE RMII UART I2S 97 98 GND Others 87 61 62 63 64 65 66 99 67 68 69 70 71 72 73 74 88 75 76 78 77 79 80 86 1 I2C 85 60 2 59 3 58 4 57 5 100 6 7 89 8 9 10 11 12 13 14 90 15 16 106 112 118 124 56 130 101 107 113 119 125 131 102 108 114 120 126 132 103 109 115 121 127 133 104 110 116 122 128 134 105 111 117 123 129 135 55 96 54 53 52 51 50 49 48 95 4
L508 Hardware Design 2 GND -- -- Ground 3 EXTON1N AI VBAT Power-on trigger, level trigger (active low) 4 RESET DI 1.8V reset input. Active low 5 GND -- -- Ground DO 6 SPI_CLK 7 SPI_MISO 8 SPI_MOSI 9 SPI_CS 10 GND -- -- Ground 11 USB_VBUS PI VBUS USB Power input 12 USB_DN AI, AO 3.3V USB high-speed data - minus 13 USB_DP AI, AO 3.3V USB high-speed data - plus 14 GND -- -- Ground 15 VDD1V8 PO 16 USB_ID DI 1.
L508 Hardware Design 24 MMC_DATA2 B 1.8V/3V Secure digital controller 1 data bit 2 25 MMC_DATA3 B 1.8V/3V Secure digital controller 1 data bit 3 26 MMC_CLK DO 1.8V/3V Secure digital controller 1 clock 27 MICN AI 28 GPIO_21 B_PU 29 MICP AI Microphone1 positive input B_PU Configurable I/O 30 WLAN_PDN DO Microphone negative input 1.8V 1.
L508 Hardware Design L508E: Voltage detection range:0-1.3V 46# ADC2 L508LA: Voltage detection range:0-1.8V. Accuracy AI is affected by temperature, can be used when the requirements are not high L508E: Voltage detection range:0-1.3V 47# ADC1 L508LA: Voltage detection range:0-1.8V. Accuracy AI is affected by temperature, can be used when the requirements are not high 48 MMC_CD DI 1.
L508 Hardware Design B_PU I2C_SDA 57 GND -- -- Ground 58 GND -- -- Ground 59 ANT_DRX AI 60 GND -- -- Ground 61 GND -- -- Ground 62 VBAT_RF PI Module RF main power 63 VBAT_RF PI Module RF main power 64 GND -- -- Ground 65 GND -- -- Ground 66 UART_RTS 67 UART_CTS 68 UART_RX B_PU DO B_PU DI B_PU DI 1.8V I2C data, Internal 4.7K pull up 56 Diversity antenna 1.8V 1.8V UART_RI 70 UART_DCD 71 UART_TX DO B_PU DO B_PU DO 1.
L508 Hardware Design sleep) 73 74 75 76 PCM_OUT PCM_IN PCM_SYNC PCM_CLK B_PU Configurable I/O B_PD PCM output data DO 1.8V SPI output data DI UART2 clear to send B_PD PCM input data DI 1.8V SPI input data DI UART2 request to Send B_PD PCM synchronization signal DO 1.8V SPI chip select DO UART2 transmit data B_PD PCM clock DO 1.
L508 Hardware Design power-on Button.
L508 Hardware Design 106 RMII_TX_CTRL B_PD 107 RMII_INT B_PU 108 RMII_LDO PI 109 RMII_MDC B_PD 110 RMII_MDIO B_PU 111 RESERVED -- 112 LCD_BK_EN 113 WIFI_CLK_26M 114 # 115 # UART2_TX UART2_RX DO B_PD AO DO B_PU DI B_PU DI RMII_L DO RMII_L DO Transmit enable RMII interrupt output RMII power input (1.8/3.3V) RMII_L DO RMII_L DO -1.8V 1.8V 1.8V 1.
L508 Hardware Design 124 PCIE_TXP AIO 0.9V Differential transmit data signal positive 125 PCIE_TXN AIO 0.9V Differential transmit data signal negative 126 PCIE_RXP AIO 0.9V Differential receive data signal positive 127 PCIE_RXN AIO 0.9V Differential receive data signal negative 128 PCIE_REFCLK_P AIO 0.9V 129 PCIE_REFCLK_N AIO 0.9V 130 AP_UART_RXD B_PU 1.8V 131 AP_UART_TXD B_PU 1.
L508 Hardware Design Table 10 operating conditions of module Description Functional description Min Typ Max Unit USB_VBUS USB power detect 3.5 5 5.5 V VBAT Module main power 3.4 3.8 4.2 V 4.3 Digital logic characteristics Table 11 Digital I/O characteristics (VDD=1.8V) Symbols Description Min Typ Max Unit VIH High-level input voltage 0.7*VDD VDD VDD+0.2 V VIL Low-level input voltage -0.3 0 0.3* VDD V VOH High-level output voltage VDD-0.
L508 Hardware Design 4.4 Power interface 4.4.1 Power pin description The L508 offers 2 VBAT_BB pins and 2 VBAT_RF pins. VBAT_BB pin is used to supply power to the baseband part and 2G RF PA of the module. VBAT_RF pin is used to supply power to the 3G+4G RF PA inside the module. The power supply voltage input range of L508 is 3.4V~4.2V, and the recommended value is 3.8V.
L508 Hardware Design VBAT_BB, VBAT_RF drive baseband and RF PA chip respectively, in order to ensure VBAT_BB, VBAT_RF voltage does not drop below 2.7V, near module, suggested to parallel a 100 uf tantalum capacitance, low ESR and 100nF, 33nF and 10nF filter capacitance, and suggested PCB go line short and wide enough, as far as possible in order to reduce the equivalent impedance of VBAT go line, to ensure maximum transmitted power, voltage is no voltage drop.
L508 Hardware Design 1 On semi MMSZ5231BT1G 500mW SOD123 2 Prisemi PZ3D4V2H 500mW SOD323 3 Vishay MMSZ4689-V 500mW SOD123 4 Crownpo CDZ55C5V1SM 500mW 0805 4.4.3 Power Supply Design Guide If the voltage difference is not big, can use "power supply scheme".
L508 Hardware Design better transient current response, meet the working requirement of the module under the weak signal of 2G, and prevent the network drop or port restart caused by power shortage. LM2596-ADJ DC_IN IN 100uF OUT VBAT 100uH 1uF 330uF GND EN 100nF 2.2K MBR360 FB MCU_GPIO 1K Figure 10 Recommended DC/DC power supply circuit 4.4.4 Charging circuit design reference The module has reserved the charging interface.
L508 Hardware Design USB_VBUS USB_VBUS MODULE 10uF ETA6003 EXTON1N 1uH SW1 SW2 IN USB_DET VBAT_BB 22uF SYS1 33K SYS2 GPIO_20 EN STAT GPIO_05 VDD1V8 33K 220K ISET1 ADC1 ADC2 ISET1 510Ω 0.1uF 1K NTC GND VBAT_RF 680K NTC VBAT BATT1 BATTERY BATT2 GND Figure 11 Charging reference circuit 4.5 USIM card interface 4.5.1 Pin Description The L508 module baseband processor integrates an ISO 7816-2 Compliant Sim card interface that supports and automatically detects 3.0 V and 1.
L508 Hardware Design 18 USIM_RST SIM reset control USIM card reset signal, output by the module, support 1.8v/3v dual voltage range. USIM card clock signal, output by the 19 USIM_CLK SIM clock module, supports 1.8V/3V dual voltage range. 53 USIM_CD USIM hot-plug detection Only 1.8 v Range is supported. Note: L508 SIM Card Channel Signals support dual-level mode, the module will automatically adapt to the type of External Sim card jump. 4.5.
L508 Hardware Design MODULE C5 33PF C6 100NF USIM_VDD 22R USIM_RST R8 USIM_CLK R9 USIM_DATA R10 USIM_CD RST 22R CLK 22R DATA 22R VCC SIM DETECT R11 VPP C2 22PF C3 22PF C4 22PF GND ESD Figure 12 SIM Card Signal Connection Circuit Note: 1. The pull-up resistors on the USIM signal lines have been designed in the module without the need to add the pull-up resistors in the peripheral circuit design. 2. The L508 supports a hot-swap design, so if you don't need one, just leave the SIM empty.
L508 Hardware Design Table 17 PCM signal interface definition Pin No. Pin Name Functional description 73 PCM_OUT PCM data output 74 PCM_IN PCM Data input 75 PCM_SYNC PCM synchronization signal 76 PCM_CLK PCM Data clock 4.6.
L508 Hardware Design Figure 15 Timing of the external CODEC for the module 4.6.3 PCM interface application In use, L508 module can only be used as the main device, PCM_SYNC, PCM_CLK are used as the output pin, PCM_SYNC output 8kHz synchronous signal, PCM Data support 8bit or 16bit Data format. And the CODEC connection from the device is shown below: MODULE NAU8814 SCL SDA SCLK SDIN PCM_CLK PCM_SYNC PCM_OUT PCM_IN BCLK FS DACIN ADCOUT MCLK VREF 12.288MHz 4.
L508 Hardware Design 2, the master clock of the PCM chip needs to be supplied by the External Crystal Oscillator, the specific design requirements can be obtained from our marketing department related documents. 3.NAU8814 is the default support for L508 as the PCM decoder chip. See L508 reference design for more details 4.7 USB2.0 interface 4.7.1 Pin Description The product has a high-speed USB2.
L508 Hardware Design MODULE USB_VBUS 1 VUSB USB_DM 2 USB_DM USB_DP 3 USB_DP 5 GND USB_ID GND D1 ESD D2 D3 D4 ESD ESD ESD Figure 17 USB application circuit 4.8 UART interface 4.8.
L508 Hardware Design 66 UART_RTS DO Request to Send 67 UART_CTS DI Clear to send 68 UART_RX DI 69 UART_RI DO Ring indicator 70 UART_DCD DO Data carrier detect 71 UART_TX DO 72 UART_DTR DI 114# UART2_TX DO UART2 transmit data 115# UART2_RX DI UART2 receive data Receive data, For AT command and data transmission. Send data, For AT command and data transmission.
L508 Hardware Design MODULE CLIENT(DTE) SERIAL PORT TXD TXD RXD RXD RTS RTS CTS CTS DTR DTR DCD DCD RING RING GND GND Figure 18 Module serial port and AP application processor full function connection method MODULE CLIENT(DTE) SERIAL PORT TXD TXD RXD RXD RTS RTS CTS CTS GND GND Figure 19 Module serial port and application processor 4-wire connection MODULE CLIENT(DTE) SERIAL PORT TXD TXD RXD RXD GND GND Copyright© Shanghai Mobiletek Communication Ltd 48
L508 Hardware Design Figure 20 Module serial port and AP application processor 2-wire connection Module interface level is 1.8 v, if the AP interface level does not match, it is recommended to add level conversion circuit. LDO_3.
L508 Hardware Design Figure 22 UART to RS232 reference circuit 4.9 SPI interface 4.9.1 Pin Description L508 module provides two sets of SPI interface, as the main device, SPI signal frequency up to 52MHz, wherein 6-9 PIN can be displayed by SPI LCD. SPI interface signals are shown in the following table. Table 20 SPI interface definitions Pin No.
L508 Hardware Design Figure 23 SPI connection diagram 1 MODULE MASTER SLAVE SPI_CLK SPI_CLK SPI_MISO SPI_MOSI SPI_MOSI SPI_MISO Figure 24 SPI connection diagram 2 4.9.3 LCD reference design The L508's SPI signal supports both 4-wire 8bit and 3-wire 9bit LCD. The maximum resolution is dependent on the frame rate of the LCD, and the maximum frame rate supported by a 240×320 screen is about 18fps. Table 21 LCD interface definitions Pin No.
L508 Hardware Design MODULE VDDIO 1uF VCC VCC_2.8V VBAT LCD 1uF VIO 背光驱动 LCD_BK_EN UART_DCD SPI_CS UART_DTR SPI_MOSI SPI_CLK GND LEDA LEDK RESET CS RS SDA SCK GND Figure 25 LCD reference design 4.10 I2C interface The control interface of I2C used to communicate with peripheral devices, SDA and SCL are two-way communication lines, running voltage is 1.8 v, high-speed mode transmission rate can reach 3.
L508 Hardware Design MODULE DEVICES SDA SDA SCL SCL GND GND Figure 26 I2C design reference circuit Note: 1. Special software versions are required to support access to I2C. 2. L508 I2C only supports the HOST mode. 4.11 Network light 4.11.1 Pin Description Table 23 NETLIGHT Pin No. Pin Name I / O type Functional description 51 NETLIGHT DO Network indicator switch control 4.11.
L508 Hardware Design Table 24 NETLIGHT status Net Status Module working status Always on Searching Network/Call Connect 200ms ON, 200ms OFF Data Transmit 800ms ON, 800ms OFF Registered network OFF Power off / Sleep VBAT LED 2K NETLIGHT R10 4.7K R11 4.7K Figure 27 NETLIGHT reference circuit 4.
L508 Hardware Design 4.13 Flight Mode The FLIGHTMODE pin can be used to control the module to enter or exit flight mode. In flight mode, the internal RF circuitry of the L508 is turned off (this feature requires special software support). When the FLIGHTMODE PIN is low, the system goes into flight mode. Table 26 FLIGHTMODE Pin No. Pin Name I / O type Functional description 54 FLIGHTMODE DI Flight Mode Control Terminal 1.8V 4.7K FLIGHTMODE 4.7K Figure 28 FLIGHTMODE design schematic 4.
L508 Hardware Design Table 27 Forced download interface definitions Pin No. Pin Name I / O type Functional description Connect DL_KEY to VDD1V8 before boot on, 85 DL_KEY DI then the system will enter USB forced download mode 4.14.2 Forced USB download interface application MODULE DL_KEY 1K VDD1V8 Figure 29 L508 download reference circuit 4.15 SD card interface 4.15.1 Pin Description The module supports SD card with 4-bit data interface, or devices based on SDIO protocol.
L508 Hardware Design 21 MMC_CMD DO Secure digital controller 1 command 22 MMC_DATA0 B Secure digital controller 1 data bit 0 23 MMC_DATA1 B Secure digital controller 1 data bit 1 24 MMC_DATA2 B Secure digital controller 1 data bit 2 25 MMC_DATA3 B Secure digital controller 1 data bit 3 26 MMC_CLK DO Secure digital controller 1 clock 44 SD_LDO PO 48 MMC_CD DI LDO output for SD card power, default voltage is 3.0V Secure digital card detection 4.15.
L508 Hardware Design Figure 30 SD card reference design 4.16 SDIO_WIFI/EMMC interface The L508 module provides a set of SDIO2.0/3.0 interfaces to the WIFI/EMMC chip, the interface level of SDIO is only 1.8V. 4.16.1 Pin Description Table 29 SDIO_WIFI/EMMC interface definitions Pin No.
L508 Hardware Design routes should be placed in the inner layer as far as possible. CLK, CMD, DATA0, DATA1, DATA2, DATA3 line equal length processing; CLK needs to be packaged separately. Table 30 SDIO routing length inside the module The length of routes outside the module should be considered the length of routes in the module. and the total length of routes should be equal. Pin No. Pin Name Length (mm) 117 WLAN_DAT1 14.81 118 WLAN_DAT2 25.53 119 WLAN_CMD 23.87 120 WLAN_DAT3 15.
L508 Hardware Design 120 WLAN_DAT3 17.28 121 WLAN_DAT0 14.60 122 WLAN_CLK 12.
L508 Hardware Design MODULE EMMC VBAT VIN WLAN_DCDC_EN EN VIN EN NC NC LDO LDO NC NC VCC OUT GND VCCQ OUT GND 10K NC WLAN_PDN RST_n WLAN_CMD SD_CMD WLAN_CLK SD_CLK WLAN_DAT0 SD_D0 WLAN_DAT1 SD_D1 WLAN_DAT2 SD_D2 WLAN_DAT3 10K 10K 10K 10K 1pF SD_D3 SD_D4 SD_D5 SD_D6 SD_D7 DS NC Figure 32 SDIO_EMMC reference design 4.17 PCIe interface The L508 module provides a RC interface (PCIe Gen1 X1 Lane) to connect to WIFI chips or other peripherals.
L508 Hardware Design 124 PCIE_TXP AO Differential transmit data signal positive 125 PCIE_TXN AO Differential transmit data signal negative 126 PCIE_RXP AI Differential receive data signal positive 127 PCIE_RXN AI Differential receive data signal negative 128 PCIE_REFCLK_P AO Reference clock signal positive 129 PCIE_REFCLK_N AO Reference clock signal negative 4.17.
L508 Hardware Design L508 module supports 10M/100M Ethernet RMII interface, 1000M RGMII interface, the RMII interface level is determined by 108 PIN RMII_LDO, RMII_LDO input power is 1.8V/3.3V adjustable. 4.18.1 Pin Description Table 32 RMII/RGMII interface definitions Pin No.
L508 Hardware Design The receiving and sending of data signals of RMII/RGMII requires a single-ended impedance of 50 ohm, and the equal length should be controlled within 3mm. Isolation measures should be taken. Table 33 RMII routing length inside the module The length of routes outside the module should be considered the length of routes in the module. and the total length of routes should be equal. Pin No. Pin Name Length (mm) 101 RMII_RXD0 11.43 102 RMII_RXD1 17.
L508 Hardware Design 103 RMII_CLK 9.70 100 RMII_RX_CTRL 11.38 104 RMII_TXD0 8.65 105 RMII_TXD1 11.66 49 STATUS（RGMII_TXD2） 42.53 51 NETLIGHT（RGMII_TXD3） 41.03 50 WAKEUP_IN（RGMII_TXCLK） 42.13 106 RMII_TX_CTRL 17.37 101 RMII_RXD0 9.90 102 RMII_RXD1 10.36 30 WLAN_PDN（RGMII_RXD2） 32.75 84 GPIO_05（RGMII_RXD3） 23.98 103 RMII_CLK 13.81 100 RMII_RX_CTRL 7.18 104 RMII_TXD0 10.84 105 RMII_TXD1 13.24 49 STATUS（RGMII_TXD2） 41.37 51 NETLIGHT（RGMII_TXD3） 41.
L508 Hardware Design MODULE ETHERNET VDD3.3V AVDD DVDD RMII_RST 4.7K RMII_LDO RJ45 with transformer GPIO_20 100K 4.7K 4.7K RMII_INT MDIO RMII_INT RMII_MDIO RMII_MDC MDC RMII_TXD0 TX0 RMII_TXD1 TX1 RMII_RXD1 RD+ RD- RX0 LED0 GREEN- RX1 LED1 RMII_CLK CLK_MODE RMII_CLK TD+ TD- RX_N TX_EN RMII_TX_CTRL RMII_RXD0 TX_P TX_N RX_P YELLOW4.7K 300Ω RX_DV 4.7K 4.7K XTALP 4.7K XTALN 4.7K 300Ω GREEN+ YELLOW+ XI XO VDD3.3V Figure 34 RMII Ethernet reference design MODULE VDD3.
L508 Hardware Design L508 module provides one analog audio input channel and one analog output channel. The output channel is (Class-AB): THD<-85dB@32-ohm loading 4.19.1 Pin Description Table 34 AUDIO interface definitions Pin No. Pin Name I / O type Functional description 27 MICN AI Microphone negative input 29 MICP AI Microphone1 positive input 31 RECN AO Receiver negative output 32 RECP AO Receiver positive output 4.19.
L508 Hardware Design MODULE RECP RECN Figure 37 Receiver reference design VBAT MODULE 2.2uF 2.2uF 4.7uF 0.1uF VDD 10K WLAN_DCDC_EN RECN RECP C1P C1N C2P INN 3K 15nF 3K 220pF 4.7uF PVDD /SHDN 15nF C2N AW8736 1nF VOP VON INP 1nF GND Figure 38 External class K amplifier reference design 4.20 ADC Pin Description as follows: Table 35 ADC Pin No. Pin Name I / O type Description 46 ADC2 AI L508E/L508TLC: 47 ADC1 AI range:0-1.
L508 Hardware Design L508LA/L508C: Voltage detection range:0-1.8V. Accuracy is affected by temperature, can be used when the requirements are not high 4.21 GPIOs The L508 has a rich GPIO interfaces and pins defined as follows: Table 36 GPIO list Reset Pin No. Pin Name GPIO voltage 6 SPI_CLK GPIO_33 1.8V B-PD ▲ 7 SPI_MISO GPIO_35 1.8V B-PD ▲ 8 SPI_MOSI GPIO_36 1.8V B-PD ▲ 9 SPI_CS GPIO_34 1.8V B-PD ▲ 28 GPIO_21 GPIO_21 1.8V B-PU ▲ 30 WLAN_PDN GPIO_04 1.
L508 Hardware Design 68 UART_RX GPIO_51 1.8V B-PU ▲ 69 UART_RI GPIO_23 1.8V B-PU ▲ 70 UART_DCD GPIO_24 1.8V B-PU ▲ 71 UART_TX GPIO_52 1.8V B-PU ▲ 72 UART_DTR GPIO_22 1.8V B-PU ▲ 73 PCM_OUT GPIO_27 1.8V B-PD ▲ 74 PCM_IN GPIO_28 1.8V B-PD ▲ 75 PCM_SYNC GPIO_26 1.8V B-PD ▲ 76 PCM_CLK GPIO_25 1.
L508 Hardware Design 4.22 Power on/off and reset interface 4.22.1 Pin Description When the VBAT is in normal state(3.4
L508 Hardware Design 4.22.2 Power-on sequence VBAT power, VAON (RTC clock source), PWRKEY also synchronous power. After the PWRKEY pin is lowered, the module starts up, and all internal power sources such as VDD1V8 start up one after another. When the Status pin becomes high, it means the module starts up and can be used normally. Table 38 power-on sequencing Symbols Pin Name Min Ton Start-up low level pulse width 0.
L508 Hardware Design Figure 39 Power on sequence diagram Note: the STATUS Pin is an indication of the module's running Status, and a high signal indicates that the module is finished booting and initializing the process, otherwise the PIN is low 4.22.3 Power-off sequence Modules have the following shutdown methods: Shut down using the PWRKEY Pin Shutdown using the "AT CPOF" command Note: 1. For a detailed description of "AT + CPOF" , refer to documentation [1] . 2.
L508 Hardware Design PWRKEY TOFF STATUS TSTATUS TUART UART available Not available Figure 40 Power-off sequence diagram Note: the Status Pin can be used to determine whether the power is on, and when the module is powered up and initialized, the STATUS output is high, otherwise it remains low. 4.22.4 Reset sequence L508 can reset the module by pulling down the RESET or PWRKEY pin. Refer to 4.22.1 for a description of restarting the module.
L508 Hardware Design MODULE PWRKEY Pulse PWRKEY R10 4.7K R11 4.7K EXTON1N RESET Pulse R12 4.7K R48 4.7K Figure 41 PWRKEY/RESET/EXTON1N reference circuit Another way to control the PWRKEY, RESET, EXTON1N pin, is to use a physical key switch directly. Place a TVS near the button for ESD protection.
L508 Hardware Design S1 S2 MODULE PWRKEY EXTON1N RESET Figure 42 PWRKEY/RESET reference circuit 4.23 Antenna interface 4.23.1 RF signal PCB layout guide The L508 module provides the RF antenna interface on the LCC pad. The antenna signal line can be matched through a microstrip line or other type of RF line via an antenna matching T or type circuit.
L508 Hardware Design ● LTE (1GHz
L508 Hardware Design performance testing and should be placed close to the module's antenna pins. Line impedance between components must be controlled at 50 ohms. MODULE Matching circuit 0Ω 0Ω R1 R2 DRX_ANT L1 L2 NC NC Figure 44 DRX antenna matching circuit schematic In the image above, R1 and R2, L1 and L2 are used for diversity antenna matching. By default, R1, R2 are 0 resistors, and L1, l2 are reserved for debugging.
L508 Hardware Design Figure 45 GNSS antenna matching circuit schematic In the image above, elements R1, L1, and L2 are used for antenna matching, and the value of the elements depends on the antenna being debugged. In figure 43, the user can add an external LNA for better gain. The L508LA/L508C/L508TLC integrated GNSS (GPS/BEIDOU/GLONASS) satellite and network information provides a high availability solution that provides industry-leading performance and accuracy.
L508 Hardware Design Figure 46 antenna feed point Copyright© Shanghai Mobiletek Communication Ltd 80
L508 Hardware Design 5 Product characteristics 5.1 Absolute maximum ratings Operating the L508 under conditions beyond its absolute maximum ratings (Table 43) may damage the device. Table 42 absolute parameters Parameters Min Max Unit VBAT limit voltage -0.5 6.0 V USB limit voltage -0.5 5.8 V -0.3 2.1 V -0.3 3.3 V I/O limit voltage: GPIO, I2C, PCM, UART, SD1_DET, USIM_DET I/O limit voltage: USIM 5.2 Operating conditions 5.2.
L508 Hardware Design Table 44 working mode Patterns Definition (GSM/WCDMA /TD-SCDMA/EVDO/L TE)Sleep (GSM/WCDMA /TD-SCDMA/EVDO/L TE) Idle (GSM/WCDMA /TD-SCDMA/EVDO) Normal operating taking mode In this case, the current consumption of module will bereduced to the minimal level. In sleep mode, the module can still receive paging message and SMS. Software is active. Module is registered to the GSM/WCDMA/TD-SCDMA/EVDO/LTE network, andthe module is ready to communicate.
L508 Hardware Design removing the power supply. In this mode, the RF part of the module will not work or the USIM card will not be accessible, orboth RF part and USIM card will be closed, and the serial port is still accessible. The power consumption in this mode is lower than normal mode. Through the "AT + CPOF" command or lower PWRKEY pin can power off L508. At this mode, the Power off module of internal power supply will be closed, and the system is stop running also. The UART and USB are unavailable.
L508 Hardware Design EVDO current Sleep modetypical： （GNSS off，without USB） Idle mode typical： LTE Sleep/Idle LTE supply current Sleep mode typical： （GNSS off，without USB） Idle mode typical：TBD UMTS Talking WCDMA B5 @power 24dBm typical： LTE Data transmission @5Mbps typical： LTE-FDD B4 @10Mbps typical： @20Mbps typical： Copyright© Shanghai Mobiletek Communication Ltd 84
L508 Hardware Design 5.3 Working and storage temperature The working storage temperature of this product is shown in Table 47. Table 46 Operating temperature Parameters Min Typ Max Unit Normal operation -40 25 85 ℃ -45 25 90 ℃ temperature Storage temperature Note: when the operating temperature exceeds the operating temperature of the module, some of the RF performance of the module may deteriorate, and may cause shutdown, restart and other faults. 5.
L508 Hardware Design 6 Design Guideline This chapter provides the general design guidance of the product, users can refer to the design guidance for design, so that the product to achieve better performance. 6.1 General Design rules and requirements When designing the peripheral circuit of this product, the user must first ensure that the external power supply circuit can provide sufficient power supply capacity and control the differential impedance of 90 ohm ± 10% for the high-speed signal line USB.
L508 Hardware Design Pre-project evaluation The selection of the antenna position first ensures that the antenna and the base station remain in the Horizontal Direction, which produces the highest efficiency; second, try to avoid placing in the switching power supply or data lines, chips and other devices that may produce electromagnetic interference or near the chip.
L508 Hardware Design Main antenna matching circuit If the connection between the RF port of the module and the antenna interface is required, the microstrip or stripline between the module RF test stand and the antenna interface RF test stand is designed for 50 ohms of characteristic impedance in the circuit design of the motherboard, if the RF connector of the antenna can be directly stuck on the RF test stand of the module, the connection between the RF port of the module and the antenna interface ca
L508 Hardware Design 7 Storage, Production and Package 7.1 Storage The rank of moisture proof of the module is level 3. There is an obvious sign on the table of the internal and the external packaging. In the vacuum sealed bag, the module can be stored for 12 months when the temperature is below 40°C and the humidity is below 90% under good air circulation.
L508 Hardware Design The module is a humidity sensitive device. If the device needs reflow soldering, disassembly and maintenance, we must strictly comply with the requirements of humidity sensitive device. If module is damp, a reflow soldering or using a hot-air gun maintenance will lead to internal damage, because the water vapor has the rapid expansion of the burst, causing physical injury to the device, like PCB foaming and BGA component fail. So customers should refer to the following recommendations.
L508 Hardware Design Table 49 Baking Conditions Baking conditions 125±5°C / 5%RH 45±5°C / 5%RH Baking time 8 hours 192 hours Description Not use the original tray Can use the original tray Notes: The original anti-ESD tray temperature does not exceed 50°C. Otherwise the tray will be deformed. The anti-ESD tray of the original packaging is only used for packaging, and can’t be used as a SMT tray. During taking and placing, please take notes of ESD and cannot be placed as overlay.
L508 Hardware Design The highest temperature can’t too high. In the condition that meet the welding quality of customer motherboard and module, the lower furnace temperature and the shorter maximum temperature time, the better. Some customer’s temperature curve in the line is not suitable, high temperature is too high, and customer motherboard melt good, but non-performing rate is on the high side.
L508 Hardware Design For SMT quality, Please ensure the necessary condition according to actual condition of factory before SMT, like SMT pressure, speed (very important), stencil ways. We must use the reflow oven more than 8 temperature zones, and strictly control the furnace temperature curve. Recommended temperature: B. constant temperature zone: temperature 140-210°C, time: 60s-120s. E. recirculation zone: PEAK temperature 220-245°C, time: 45s-75s.
L508 Hardware Design 7.3 Packaging Information The L508 Series module are packaged with a roll of tape and sealed with a vacuum-sealed antistatic bag. Coil tape One coil can hold 500 modules, as shown in the figure.
L508 Hardware Design 8 Safety Information For the reasonable usage of the module, please comply with all these safety notices of this page. The product manufacturers should send followed safety information to user, operator or product’s spec. The devices using the module may disturb some electronic equipment. Put the module away from the phone, TV, radio and automation equipment to avoid the module and the equipment to interfere with each other.
L508 Hardware Design The module is not water proof. Please don’t use the module in the area with high humidity like bathroom, which will decelerate the physical performance, insulation resistance and mechanical strength. Non-professionals can’t teardown the module which will damage it. Refer to the specification or communicate the related staffs to repair and maintain it. Please switch on the module before cleaning. The staffs should be equipped with anti-ESD clothing and gloves.
FCC Caution. § 15.19 Labelling requirements. This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. § 15.21 Information to user. Any Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate the equipment. § 15.
1.5RF exposure considerations: This equipment complies with FCC radiation exposure limits set forth for an uncontrolled environment. This equipment should be installed and operated withmini mum distance 20cm between the radiator & your body. 1.6Antennas: The module does not have a standard antenna. 1.7Label and compliance information This device complies with part 15 of the FCC Rules. Operation is subject to the condition that this device does not cause harmful interference.
