User manual
DEFINITY Enterprise Communications Server Release 6
Maintenance for R6vs/si 
555-230-127  
Issue 1
August 1997
Maintenance Object Repair Procedures 
Page 10-1295TBRI-PT (TN2185 ISDN Trunk-Side BRI Port) 
10
Level 1 Status Inquiry Test (#1242) 
This test is non-destructive.
This test determines the state of the transmission facility of a BRI port at the 
Level 1 (L1) physical layer: Activated, Pending Activation, or Deactivated.
The Activated state is the correct state for an ISDN-BRI port. In this state the L1 
interface can send and receive synchronized signals. This test passes if the state 
of L1 is Activated. This test also passes if software has taken this port out of 
service. See the description of the L1 “Deactivated State” below for more details.
The Pending Activation state indicates a problem with the channels, the wiring, or 
the TBRI-BD circuit pack. When in this state, the Level 1 interface is either not 
receiving any L1 framing from the channel, or it is communicating with the 
channel but cannot transition to the Activated state.
Table 10-447. TEST #625 Receive FIFO Overflow 
Error Counter Test 
Error 
Code
Test 
Result Description/ Recommendation
2000 ABORT Response to the test was not received from the circuit pack within the 
allowable time period.
1. If the test aborts repeatedly a maximum of 5 times, reset the circuit 
pack with the busyout board PCSS and reset board PCSS 
commands.
2. If the test aborts again, replace the circuit pack.
2012 ABORT Internal system error
2100 ABORT Could not allocate the necessary system resources to run this test.
1. Retry the command at 1-minute intervals a maximum of 5 times.
value FAIL The TBRI-BD circuit pack is still detecting errors of this type. The Error 
Code field contains the value of this counter.
1. Retry the command at 1-minute intervals a maximum of 5 times.
2. If the test continues to fail, run the Long Test Sequence and pay 
particular attention to the Looparound Tests (#618 and #619). See the 
repair procedures for the executed test if it fails. Otherwise, go to the 
next step.
3. Replace the circuit pack.
PASS The Receive FIFO Overflow error counter was read correctly and has a 
value of 0.
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