User Guide
DEFINITY Enterprise Communications Server Release 5
Maintenance and Test for R5vs/si 
555-230-123
Issue 1
April 1997
Maintenance Object Repair Procedures 
Page 10-1332SYNC (Synchronization) 
10
documentation to resolve any errors associated with the primary 
DS1 interface circuit pack. If no errors are listed in the Error Log for 
the primary DS1 interface circuit pack, continue with the following 
steps.
4.Test the active Tone-Clock circuit pack in the master port network via the 
test tone/clock PC long command. Check the Error Log for 
TDM-CLK errors and verify that TDM Bus Clock Test #148 passes 
successfully. If Test #148 fails with an Error Code 2 through 32, 
refer to “TDM-CLK” to resolve the problem. If not, continue with the 
following steps.
5.Execute the disable synchronization-switch and the enable 
synchronization-switch commands. These two commands (when 
executed together) switch the system synchronization reference to 
the primary DS1 interface circuit pack. Check the Error Log and 
execute the status synchronization command to verify that the 
primary DS1 interface circuit pack is still the system 
synchronization reference. If the primary DS1 interface circuit pack 
is not the system synchronization reference, and this is not a High 
or Critical Reliability system, continue with the following step.
6.High or Critical Reliability system: 
Switch Tone-Clock circuit packs on the master port network via the 
set tone/clock PC command, and repeat the disable/enable 
commands described in the previous step. 
b. This error indicates that Synchronization Maintenance has been disabled 
via the disable synchronization-switch command. Execute the enable 
synchronization-switch command to enable Synchronization 
Maintenance reference switching and to resolve this alarm.
c. This error indicates a problem with the secondary DS1 reference. It is 
cleared when the secondary reference is restored. Refer to note (a) to 
resolve this error substituting secondary for primary in the preceding 
resolution steps.
d. This error indicates that the Tone-Clock circuit pack is providing the timing 
source for the system. The primary and secondary (if administered) are 
not providing a valid timing signal. Investigate errors 1 and 257 to resolve 
this error.
e. This error indicates that the external Stratum 3 Clock fails to provide the 
system timing reference. Refer to Stratum 3 Clock Maintenance document 
to resolve the defective synchronization reference.
This error indicates excessive switching of system synchronization 
references has occurred. When this error occurs, synchronization is 
disabled and the Tone-Clock circuit pack (in the master port network) 
becomes the synchronization reference for the system. Execute the 
following steps to resolve this error:
1.Check for timing loops and resolve any loops that exist.










