User`s guide

LSI Confidential
1-4 Introduction
Copyright © 2006-2007 by LSI Corporation. All rights reserved.
1.3 PCI Performance
LSI PCIe to SAS HBA boards support the PCI Express interface. The
PCI Express features of the LSI PCIe to SAS HBAs include:
• Provides four (boards using LSISAS1064E) or eight (boards using
LSISAS1068E) PCI Express PHYs
• Supports a single-PHY (1 lane) link transfer rate up to 2.5-Gb/s in
each direction
• Supports x8, x4, and x1 link widths
• Automatically downshifts to a x4 link width if plugged into a x4
connector or into a x8 connector that is wired as a x4 connector
• Provides a scalable interface
– Single-lane aggregate bandwidth of up to 0.5-GB/s
(500-MB/s)
– Quad-lane aggregate bandwidth of up to 2.0-GB/s
(2000-MB/s)
– 8-lane aggregate bandwidth of up to 4.0-GB/s
(4000-MB/s)
• Supports serial, point-to-point interconnections between devices
– Reduces the electrical load of the connection
– Enables higher transmission and reception frequencies
• Supports lane reversal and polarity inversion
• Supports PCI express hot plug
• Supports power management
– Supports PCI power management 1.2
– Supports Active State Power Management (ASPM), including the
L0, L0s, L1 states, by placing links in a power-savings mode
during times of no link activity
• Contains a replay buffer that preserves a copy of the data for
retransmission in case a CRC error occurs
• Supports the PCI Express advanced error reporting capabilities
• Uses a packetized and layered architecture