Logic PCI to Dual Channel SCSI Host Adapter User's Guide LSI21003
Table Of Contents
- LSI21003 PCI to Dual Channel SCSI Host Adapter
- Chapter1 Using the LSI21003
- Chapter2 Installing the LSI21003
- 2.1 Quick Installation Procedure
- 2.2 Detailed Installation Procedure
- 2.2.1 Before You Start
- 2.2.2 Inserting the Host Adapter
- 2.2.3 Connecting the SCSI Peripherals
- Figure2.3 SCSI Cables
- Figure2.4 Internal SCSI Ribbon Cable to Host Adapter
- Figure2.5 Internal SCSI Ribbon Cable to Internal SCSI Device Connection
- Figure2.6 Connecting Additional Internal SCSI Devices
- Figure2.7 Multiple Internal SCSI Devices Chained Together
- Figure2.8 SCSI LED Connector
- Figure2.9 External Cable to Host Adapter
- Figure2.10 External Cable to External SCSI Device
- Figure2.11 Multiple External SCSI Devices Chained Together
- 2.2.4 SCSI Bus Termination
- 2.3 Setting SCSI IDs
- 2.4 Setting Interrupts (Exceptional Cases)
- 2.5 Completing the Installation
- Chapter3 Technical Specifications
- 3.1 Physical Environment
- 3.2 Operational Environment
- 3.2.1 The PCI Interface
- Table 3.2 PCI Connector J1 Front Side Signals
- Table 3.3 PCI Connector J1 Back Side Signals
- 3.2.2 The SCSI Interface
- Table 3.4 SCSI Connector J2, Channel A, Internal
- Table 3.5 SCSI Connector J3, Channel A, External
- Table 3.6 SCSI Connector J4, Channel A, Internal
- Table 3.7 SCSI Connector J5, Channel B, Internal
- Table 3.8 Connector J6 Signals
- 3.3 Subsystem and Subsystem Vendor ID
- AppendixA Glossary of Terms and Abbreviations
- Index
- Customer Feedback

3.75 pc 10.25 pc 11.25 pc 38.25 pc
4.333 pc
48.583 pc
52.5 pc
34.5 pc
44.25 pc
Glossary of Terms and Abbreviations A-5
Parity Checking A way to verify the accuracy of data transmitted over the SCSI bus. The
parity bit in the transfer is used to make the sum of all the 1 bits either
odd or even (for odd or even parity). If the sum is not correct, the
information may be retransmitted or an error message may appear.
Passive
Termination
The electrical connection required at each end of the SCSI bus,
composed of a set of resistors. It improves the integrity of bus signals.
PCI Peripheral Component Interconnect. A local bus specification that allows
connection of peripherals directly to computer memory. It bypasses the
slower ISA and EISA buses.
Peripheral
Devices
A piece of hardware (such as a video monitor, disk drive, printer, or
CD-ROM) used with a computer and under the computer’s control. SCSI
peripherals are controlled through a SCSI host adapter.
Pin-1
Orientation
The alignment of pin 1 on a SCSI cable connector and the pin-1 position
on the SCSI connector into which it is inserted. External SCSI cables are
always keyed to insure proper alignment, but internal SCSI ribbon cables
sometimes are not keyed.
PIO Programmed Input/Output. A way the CPU can transfer data to and from
memory using the computer’s I/O ports. PIO is usually faster than DMA,
but requires CPU time.
Port Address Also Port Number. The address through which commands are sent to a
host adapter board. This address is assigned by the PCI bus.
Port Number See Port Address.
Queue Tags A way to keep track of multiple commands that allow for increased
throughput on the SCSI bus.
RAM Random Access Memory. The computer’s primary working memory in
which program instructions and data are stored and are accessible to the
CPU. Information can be written to and read from RAM. The contents of
RAM are lost when the computer is turned off.
RISC Core LSI Logic SCSI chips contain a RISC (Reduced Instruction Set
Computer) processor, programmed through microcode SCRIPTS.
ROM Read Only Memory. Memory from which information can be read but not
changed. The contents of ROM are not erased when the computer is
turned off.










