Data Sheet
LJ1269HC
Rev1.0 Page 46 Web: www.ljelect.com
Configuration
Size: Sync word size can be set from 1 to 8 bytes (i.e. 8 to 64 bits) via SyncSize in RegSyncConfig. In Packet mode this
field is also used for Sync word generation in Tx mode.
Error tolerance: The number of errors tolerated in the Sync word recognition can be set from 0 to 7 bits to via
SyncTol.
Value: The Sync word value is configured in SyncValue(63:0). In Packet mode this field is also used for Sync word
generation in Tx mode.
Note SyncValue choices containing 0x00 bytes are not allowed
、
5.2.4. Packet Handler
The packet handler is the block used in Packet mode. Its functionality is fully described in section 5.5.
5.2.5. Control
The control block configures and controls the full module's behavior according to the settings programmed in the configuration
registers.
5.3. Digital IO Pins Mapping
Six general purpose IO pins are available on the LJ1269HC , and their configuration in Continuous or Packet mode is controlled
through RegDioMapping1 and RegDioMapping2.
5.3.1. DIO Pins Mapping in Continuous Mode
Table 21 DIO Mapping, Continuous Mode
Mode
Diox Mapping
DIO5
DIO4
DIO3
DIO2
DIO1
DIO0
Sleep
00
-
-
-
-
-
-
01
-
-
-
-
-
-
10
-
-
AutoMode
-
-
-
11
ModeReady
-
-
-
-
ModeReady
Stdby
00
ClkOut
-
-
-
-
-
01
-
-
-
-
-
-
10
-
-
AutoMode
-
-
-
11
ModeReady
-
-
-
-
ModeReady
FS
00
ClkOut
-
-
-
-
PllLock
01
-
-
-
-
-
-
10
-
-
AutoMode
-
-
-
11
ModeReady
PllLock\
-
-
PllLock
ModeReady
Rx
00
ClkOut
Timeout
Rssi
Data
Dclk
SyncAddress
01
Rssi
RxReady
RxReady
Data
RxReady
Timeout
10
-
SyncAddress
AutoMode
Data
-
Rssi
11
ModeReady
PllLock
Timeout
Data
SyncAddress
ModeReady
Tx
00
ClkOut
TxReady
TxReady
Data
Dclk
PllLock
01
ClkOut
TxReady
TxReady
Data
TxReady
TxReady
10
-
-
AutoMode
Data
-
-
11
ModeReady
PllLock
TxReady
Data
PllLock
ModeReady
5.3.2. DIO Pins Mapping in Packet Mode
Sub GHz FSK/OOK Transceiver Module DATASHEET