Data Sheet

LJ1269HC
Rev1.0 Page 18 Web: www.ljelect.com
3.3. Transmitter Description
The transmitter of LJ1269HC comprises the frequency synthesizer, modulator and power amplifier blocks.
3.3.1. Architecture Description
Figure 4. Transmitter Block Diagram
3.3.2. Bit Rate Setting
When using the LJ1269HC in Continuous mode, the data stream to be transmitted can be input directly to the modulator via pin
DIO2/DATA in an asynchronous manner, unless Gaussian filtering is used, in which case the DCLK signal on pin DIO1/DCLK is
used to synchronize the data stream. See section 3.3.5 for details on the Gaussian filter.
In Packet mode or in Continuous mode with Gaussian filtering enabled (refer to section 5.5 for details), the Bit Rate (BR) is
controlled by bits BitRate in RegBitrate:
Amongst others, the following Bit Rates are accessible:
Sub GHz FSK/OOK Transceiver Module DATASHEET
BR=
𝐹
𝑋𝑂𝑆𝐶
𝐵𝑖𝑡𝑅𝑎𝑡𝑒